/********************************************************************************************************************************/
/* Created:  9-Nov-2023 12:07:13 by OpenVMS SDL V3.7       */
/* Source:  09-NOV-2023 12:07:10 $1$DGA8345:[STARLET_H.SRC]STARDEFFL.SDI;1 */
/********************************************************************************************************************************/
/*** MODULE $IA64REGDEF ***/
#ifndef __IA64REGDEF_LOADED
#define __IA64REGDEF_LOADED 1
 
#pragma __nostandard			 /* This file uses non-ANSI-Standard features */
#pragma __member_alignment __save
#pragma __nomember_alignment
#ifdef __INITIAL_POINTER_SIZE			 /* Defined whenever ptr size pragmas supported */
#pragma __required_pointer_size __save		 /* Save the previously-defined required ptr size */
#pragma __required_pointer_size __short		 /* And set ptr size default to 32-bit pointers */
#endif
 
#ifdef __cplusplus
    extern "C" {
#define __unknown_params ...
#define __optional_params ...
#else
#define __unknown_params
#define __optional_params ...
#endif
 
#ifndef __struct
#if !defined(__VAXC)
#define __struct struct
#else
#define __struct variant_struct
#endif
#endif
 
#ifndef __union
#if !defined(__VAXC)
#define __union union
#else
#define __union variant_union
#endif
#endif
 
/* Special Registers                                                        */
#define IA64_REG$_IP 1016               /* getReg only                      */
#define IA64_REG$_PSR_UM 1017
#define IA64_REG$_PSR 1019
#define IA64_REG$_PSR_L 1019
/* General Integer Registers                                                */
#define IA64_REG$_GP 1025               /* R1                               */
#define IA64_REG$_SP 1036               /* R12                              */
#define IA64_REG$_TP 1037               /* R13                              */
	
/* Constants for 'hint' instruction                                         */
#define IA64_REG$HINT_PAUSE 0
#define IA64_REG$HINT_WAIT 64
/* Application Registers                                                    */
#define IA64_REG$_AR_KR0 3072
#define IA64_REG$_AR_KR1 3073
#define IA64_REG$_AR_KR2 3074
#define IA64_REG$_AR_KR3 3075
#define IA64_REG$_AR_KR4 3076
#define IA64_REG$_AR_KR5 3077
#define IA64_REG$_AR_KR6 3078
#define IA64_REG$_AR_KR7 3079
#define IA64_REG$_AR_RSC 3088
#define IA64_REG$_AR_BSP 3089
#define IA64_REG$_AR_BSPSTORE 3090
#define IA64_REG$_AR_RNAT 3091
#define IA64_REG$_AR_FCR 3093
#define IA64_REG$_AR_EFLAG 3096
#define IA64_REG$_AR_CSD 3097
#define IA64_REG$_AR_SSD 3098
#define IA64_REG$_AR_CFLAG 3099
#define IA64_REG$_AR_FSR 3100
#define IA64_REG$_AR_FIR 3101
#define IA64_REG$_AR_FDR 3102
#define IA64_REG$_AR_CCV 3104
#define IA64_REG$_AR_UNAT 3108
#define IA64_REG$_AR_FPSR 3112
#define IA64_REG$_AR_ITC 3116
#define IA64_REG$_AR_RUC 3117
#define IA64_REG$_AR_PFS 3136
#define IA64_REG$_AR_LC 3137
#define IA64_REG$_AR_EC 3138
/* Control Registers                                                        */
#define IA64_REG$_CR_DCR 4096
#define IA64_REG$_CR_ITM 4097
#define IA64_REG$_CR_IVA 4098
#define IA64_REG$_CR_PTA 4104
#define IA64_REG$_CR_IPSR 4112
#define IA64_REG$_CR_ISR 4113
#define IA64_REG$_CR_IIP 4115
#define IA64_REG$_CR_IFA 4116
#define IA64_REG$_CR_ITIR 4117
#define IA64_REG$_CR_IIPA 4118
#define IA64_REG$_CR_IFS 4119
#define IA64_REG$_CR_IIM 4120
#define IA64_REG$_CR_IHA 4121
#define IA64_REG$_CR_IIB0 4122          /* getReg only                      */
#define IA64_REG$_CR_IIB1 4123          /* getReg only                      */
#define IA64_REG$_CR_LID 4160
#define IA64_REG$_CR_IVR 4161           /* getReg only                      */
#define IA64_REG$_CR_TPR 4162
#define IA64_REG$_CR_EOI 4163
#define IA64_REG$_CR_IRR0 4164          /* getReg only                      */
#define IA64_REG$_CR_IRR1 4165          /* getReg only                      */
#define IA64_REG$_CR_IRR2 4166          /* getReg only                      */
#define IA64_REG$_CR_IRR3 4167          /* getReg only                      */
#define IA64_REG$_CR_ITV 4168
#define IA64_REG$_CR_PMV 4169
#define IA64_REG$_CR_CMCV 4170
#define IA64_REG$_CR_LRR0 4176
#define IA64_REG$_CR_LRR1 4177
/* Indirect Registers for getIndReg() and setIndReg()                       */
#define IA64_REG$_INDR_CPUID 9000       /* getIndReg only                   */
#define IA64_REG$_INDR_DBR 9001
#define IA64_REG$_INDR_IBR 9002
#define IA64_REG$_INDR_PKR 9003
#define IA64_REG$_INDR_PMC 9004
#define IA64_REG$_INDR_PMD 9005
#define IA64_REG$_INDR_RR 9006
	
 
#pragma __member_alignment __restore
#ifdef __INITIAL_POINTER_SIZE			 /* Defined whenever ptr size pragmas supported */
#pragma __required_pointer_size __restore		 /* Restore the previously-defined required ptr size */
#endif
#ifdef __cplusplus
    }
#endif
#pragma __standard
 
#endif /* __IA64REGDEF_LOADED */