/***************************************************************************/ /** **/ /** HPE CONFIDENTIAL. This software is confidential proprietary software **/ /** licensed by Hewlett-Packard Enterprise Development, LP, and is not **/ /** authorized to be used, duplicated OR disclosed to anyone without the **/ /** prior written permission of HPE. **/ /** © 2023 Copyright Hewlett-Packard Enterprise Development, LP **/ /** **/ /** VMS SOFTWARE, INC. CONFIDENTIAL. This software is confidential **/ /** proprietary software licensed by VMS Software, Inc., and is not **/ /** authorized to be used, duplicated or disclosed to anyone without **/ /** the prior written permission of VMS Software, Inc. **/ /** © 2023 Copyright VMS Software, Inc. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 9-Nov-2023 12:06:52 by OpenVMS SDL V3.7 */ /* Source: 31-MAY-2022 07:49:05 $1$DGA8345:[LIB_H.SRC]SWISDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $SWISDEF ***/ #ifndef __SWISDEF_LOADED #define __SWISDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /*+ */ /* DEFINITION OF SWIS Data Structure */ /*- */ #include #if defined(__ia64) /* Verified for X86 port - Camiel Vanderhoeven */ #include #define SWIS$A_DATA_ADDRESS 0xE000000000000000L #endif /* __IA64 */ #define SWIS$K_SWISDATA_OFFSET 0 #define SWIS$K_IDT_OFFSET 8 #define SWIS$K_SISR_OFFSET 16 #define SWIS$K_ASTSR_ASTEN_OFFSET 24 #define SWIS$M_HWPCB_MASK 0xFF #define SWIS$M_ASTEN 0xF #define SWIS$M_ASTSR 0xF0 #define SWIS$K_IPL_OFFSET 32 #define SWIS$K_PREVMODE_OFFSET 36 #define SWIS$K_CURSTACKMODE_OFFSET 40 #define SWIS$K_CURMODE_OFFSET 44 #define SWIS$K_CUR_FRAME_MODE_OFFSET 48 #define SWIS$K_CUR_FRAME_OFFSET 52 #define SWIS$K_INTERRUPT_DEPTH_OFFSET 60 #define SWIS$K_KT_ID_OFFSET 64 #define SWIS$K_FLAGS_OFFSET 68 #define SWIS$M_DISABLE_LOG 0x1 #define SWIS$M_INHIBIT_LOG 0x2 #define SWIS$M_ENABLE_REG_TEST 0x4 #define SWIS$M_REG_ERROR_DETECTED 0x8 #define SWIS$M_VIRTUAL_MACHINE 0x10 #define SWIS$K_RFLAGS_SET_MASK_OFFSET 72 #define SWIS$K_RFLAGS_CLEAR_MASK_OFFSET 80 #define SWIS$K_CPUID_OFFSET 88 #define SWIS$K_HWPCB_VA_OFFSET 96 #define SWIS$K_APIC_BASE_VA_OFFSET 104 #define SWIS$K_PCB_VA_OFFSET 112 #define SWIS$K_ALPHAREG_OFFSET 120 #define SWIS$K_CR3_OFFSET 280 #define SWIS$K_SLOT_VA_OFFSET 344 #define SWIS$K_CPUDB_VA_OFFSET 352 #define SWIS$K_GDT_OFFSET 368 #define SWIS$K_GDT_LIMIT 55 #define SWIS$K_TSS_OFFSET 432 #define SWIS$K_RSP_OFFSET 432 #define SWIS$K_IOMAP_OFFSET 104 #define SWIS$K_TSS_LIMIT 107 #define SWIS$K_SCRATCH_HWPCB_OFFSET 1024 #define SWIS$K_XSAVE_SIZE_OFFSET 1536 #ifdef __cplusplus /* Define structure prototypes */ struct _hwpcb; #endif /* #ifdef __cplusplus */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _swis { #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *swis$pq_swisdata; /* VA of this structure */ #else unsigned __int64 swis$pq_swisdata; #endif #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *swis$pq_idt; /* Interruption dispatch table */ #else unsigned __int64 swis$pq_idt; #endif unsigned int swis$l_sisr; /* SISR */ unsigned int swis$l_filler_1; /* Align to quadword */ __union { unsigned __int64 swis$q_astsr_asten; /* ASTSR and ASTEN (quadword because of previous use) */ __struct { __union { unsigned swis$v_swis_astsr_asten : 8; /* ASTSR and ASTEN */ unsigned swis$v_hwpcb_mask : 8; /* To be removed when we get it out of code. */ __struct { unsigned swis$v_asten : 4; /* AST Enable Register */ unsigned swis$v_astsr : 4; /* AST Pending Summary Register */ } swis$r_ast_bits0; } swis$r_ast_overlay; } swis$r_swis_astsr_asten_fill; } swis$r_hwpcb_ast_overlay; unsigned int swis$l_ipl; unsigned int swis$l_prevmode; unsigned int swis$l_curstackmode; unsigned int swis$l_curmode; /* Curent mode */ int swis$l_cur_frame_mode; /* Mode interrupted by current frame, if the emulated Alpha */ /* registers have not been saved yet. Otherwise -1 */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *swis$pq_cur_frame; /* Pointer to currently active interrupt or SSENTRY frame */ #else unsigned __int64 swis$pq_cur_frame; #endif unsigned int swis$l_interrupt_depth; unsigned int swis$l_kt_id; __union { int swis$l_flags; __struct { unsigned swis$v_disable_log : 1; unsigned swis$v_inhibit_log : 1; unsigned swis$v_enable_reg_test : 1; unsigned swis$v_reg_error_detected : 1; unsigned swis$v_virtual_machine : 1; /*This should get same value as exe$v_virtual_machine */ unsigned swis$v_fill_0_ : 3; } swis$r_bits; } swis$r_flag_union; unsigned __int64 swis$q_rflags_set_mask; /* RFLAGS set template mask */ unsigned __int64 swis$q_rflags_clear_mask; /* RFLAGS clear template mask */ unsigned __int64 swis$q_cpuid; /* Current CPU Id */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ struct _hwpcb *swis$pq_hwpcb_va; /* pointer to HWPCB */ #else unsigned __int64 swis$pq_hwpcb_va; #endif unsigned __int64 swis$q_local_apic_base_va; /* Base address of local xAPIC, 0 if x2APIC mode (use MSRs) */ unsigned __int64 swis$q_pcb_va; /* Pointer to PCB */ #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *swis$pq_alphareg [4]; /* Pointers to emulated Alpha registers for each mode */ #else unsigned __int64 swis$pq_alphareg [4]; #endif unsigned __int64 swis$q_scratch [16]; unsigned __int64 swis$q_cr3 [4]; /* CR3 values for each mode */ unsigned __int64 swis$q_knv_good_sp; /* Here is where we get an SP to use when we get a KSTINV */ unsigned __int64 swis$q_knv_trap_type; /* Trap type we entered with when KSTINV detected */ unsigned __int64 swis$q_knv_ksp; /* SP at the time of the KSTINV */ unsigned __int64 swis$q_knv_count; /* Count to detect recursive KSTINV */ unsigned __int64 swis$q_slot_va; /* A pointer to the CPU slot */ unsigned __int64 swis$q_cpudb_va; /* A pointer to the CPUDB for this CPU */ /* pad to next 16 byte boundary */ char swis$t_filler_gdt [8]; unsigned __int64 swis$q_gdt [7]; /* Global Descriptor Table for this CPU */ /* pad to next 16 byte boundary */ char swis$t_filler_tss [8]; /* Here follows the Task State Segment for this CPU. We embed it here, because - like */ /* the SWIS data structure, it is a per-cpu structure, and it contains one field - the */ /* kernel-mode stack pointer - that was part of the SWIS data structure on Itanium. */ unsigned int swis$l_tss_mbz0; /* Reserved Must Be Zero */ /* The following overlay bears a little explanation. When an interrupt occurs while the */ /* system is not in kernel mode, the processor gets the ring 0 stack pointer from the */ /* TSS. There are also slots for the ring 1 and ring 2 stack pointers, which are not */ /* used by any of the mechanisms we use in VMS. The ring 0, 1, and 2 stack pointers are */ /* followed by a reserved quadword, and is then followed by the 7 interrupt stack */ /* IST1 .. IST7. For VMS, we co-opt the reserved quadword for the user-mode stack */ /* pointer. We use an overlay to present the stack pointers as either KSP, ESP, SSP, and */ /* USP, or as RSP[0..3]. Since arrays are 0-based, we also use the overlay to have */ /* IST[0..7], of which IST[0] should never be used, as it's aliased with USP. */ __union { __struct { #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *swis$pq_cur_rsp [4]; /* RSP[mode] */ #else unsigned __int64 swis$pq_cur_rsp [4]; #endif __int64 swis$q_rsp_fill [7]; /* IST 1 - 7 */ } swis$r_rsp_rsp; __struct { #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *swis$pq_cur_ksp; /* KSP stored here when process current, not using KSP */ #else unsigned __int64 swis$pq_cur_ksp; #endif #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *swis$pq_cur_esp; /* ESP stored here when process current, not in exec mode */ #else unsigned __int64 swis$pq_cur_esp; #endif #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *swis$pq_cur_ssp; /* SSP stored here when process current, not in super mode */ #else unsigned __int64 swis$pq_cur_ssp; #endif #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *swis$pq_cur_usp; /* USP stored here when process current, not in user mode */ #else unsigned __int64 swis$pq_cur_usp; #endif __int64 swis$q_ksp_fill [7]; /* IST 1 - 7 */ } swis$r_rsp_ksp; __struct { __int64 swis$q_ist_fill [3]; /* RSP 0 - 2 */ unsigned __int64 swis$q_tss_ist [8]; /* Interrupt Stack Pointers */ } swis$r_rsp_ist; } swis$r_rsp_overlay; unsigned __int64 swis$q_tss_mbz92; /* Reserved Must Be Zero */ unsigned short int swis$w_tss_mbz100; /* Still More MBZ */ unsigned short int swis$w_tss_iomap_base; /* I/O map base address The 16-bit offset to the */ /* I/O permission bit map from the 64-bit TSS base. */ unsigned int swis$l_tss_iomap; /* Very short IO map (ask Camiel) */ unsigned __int64 swis$q_next_timer; unsigned __int64 swis$q_intr_flag; /* Used only by AMOVRR, AMOVRM, RS */ /* pad to next 512 byte boundary */ char swis$t_filler_5 [468]; char swis$iq_scratch_hwpcb [512]; /* Scratch area at least the size of a HWPCB */ /* Note: HWPCB defined in HWRPBDEF.SDL */ unsigned __int64 swis$q_xsave_area_size; /* Size of XSAVE area */ unsigned __int64 swis$q_kstack_top; unsigned __int64 swis$q_kstack_bottom; char swis$q_low_level_trace [6632]; } SWIS; #if !defined(__VAXC) #define swis$q_astsr_asten swis$r_hwpcb_ast_overlay.swis$q_astsr_asten #define swis$v_swis_astsr_asten swis$r_hwpcb_ast_overlay.swis$r_swis_astsr_asten_fill.swis$r_ast_overlay.swis$v_swis_astsr_asten #define swis$v_hwpcb_mask swis$r_hwpcb_ast_overlay.swis$r_swis_astsr_asten_fill.swis$r_ast_overlay.swis$v_hwpcb_mask #define swis$v_asten swis$r_hwpcb_ast_overlay.swis$r_swis_astsr_asten_fill.swis$r_ast_overlay.swis$r_ast_bits0.swis$v_asten #define swis$v_astsr swis$r_hwpcb_ast_overlay.swis$r_swis_astsr_asten_fill.swis$r_ast_overlay.swis$r_ast_bits0.swis$v_astsr #define swis$l_flags swis$r_flag_union.swis$l_flags #define swis$v_disable_log swis$r_flag_union.swis$r_bits.swis$v_disable_log #define swis$v_inhibit_log swis$r_flag_union.swis$r_bits.swis$v_inhibit_log #define swis$v_enable_reg_test swis$r_flag_union.swis$r_bits.swis$v_enable_reg_test #define swis$v_reg_error_detected swis$r_flag_union.swis$r_bits.swis$v_reg_error_detected #define swis$v_virtual_machine swis$r_flag_union.swis$r_bits.swis$v_virtual_machine #define swis$pq_cur_rsp swis$r_rsp_overlay.swis$r_rsp_rsp.swis$pq_cur_rsp #define swis$pq_cur_ksp swis$r_rsp_overlay.swis$r_rsp_ksp.swis$pq_cur_ksp #define swis$pq_cur_esp swis$r_rsp_overlay.swis$r_rsp_ksp.swis$pq_cur_esp #define swis$pq_cur_ssp swis$r_rsp_overlay.swis$r_rsp_ksp.swis$pq_cur_ssp #define swis$pq_cur_usp swis$r_rsp_overlay.swis$r_rsp_ksp.swis$pq_cur_usp #define swis$q_tss_ist swis$r_rsp_overlay.swis$r_rsp_ist.swis$q_tss_ist #endif /* #if !defined(__VAXC) */ #define SWIS$K_LENGTH 8192 #define SWIS$C_LENGTH 8192 #define SWIS$C_PAGE_SIZE 8192 /* Map with 8KB page size */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __SWISDEF_LOADED */