/***************************************************************************/
/**                                                                       **/
/** HPE CONFIDENTIAL. This software is confidential proprietary software  **/
/** licensed by Hewlett-Packard Enterprise Development, LP, and is not    **/
/** authorized to be used, duplicated OR disclosed to anyone without the  **/
/** prior written permission of HPE.                                      **/
/** © 2023 Copyright Hewlett-Packard Enterprise Development, LP           **/
/**                                                                       **/
/** VMS SOFTWARE, INC. CONFIDENTIAL. This software is confidential        **/
/** proprietary software licensed by VMS Software, Inc., and is not       **/
/** authorized to be used, duplicated or disclosed to anyone without      **/
/** the prior written permission of VMS Software, Inc.                    **/
/** © 2023 Copyright VMS Software, Inc.                                   **/
/**                                                                       **/
/***************************************************************************/
/********************************************************************************************************************************/
/* Created:  9-Nov-2023 12:06:49 by OpenVMS SDL V3.7       */
/* Source:  22-APR-1993 14:15:46 $1$DGA8345:[LIB_H.SRC]SSCDEF.SDL;1 */
/********************************************************************************************************************************/
/*** MODULE $SSCDEF ***/
#ifndef __SSCDEF_LOADED
#define __SSCDEF_LOADED 1
 
#pragma __nostandard			 /* This file uses non-ANSI-Standard features */
#pragma __member_alignment __save
#pragma __nomember_alignment
#ifdef __INITIAL_POINTER_SIZE			 /* Defined whenever ptr size pragmas supported */
#pragma __required_pointer_size __save		 /* Save the previously-defined required ptr size */
#pragma __required_pointer_size __short		 /* And set ptr size default to 32-bit pointers */
#endif
 
#ifdef __cplusplus
    extern "C" {
#define __unknown_params ...
#define __optional_params ...
#else
#define __unknown_params
#define __optional_params ...
#endif
 
#ifndef __struct
#if !defined(__VAXC)
#define __struct struct
#else
#define __struct variant_struct
#endif
#endif
 
#ifndef __union
#if !defined(__VAXC)
#define __union union
#else
#define __union variant_union
#endif
#endif
 
/*++                                                                        */
/*	SSC definitions                                                     */
/*--                                                                        */
/* The BASE register is at physical address %X2014000.  It is loaded with   */
/* a value at which to locate all the other registers.  All other registers */
/* are at @BASE+offset.                                                     */
#define SSC$AL_BASE 538181632           /*Base address                      */
#define SSC$L_CONFIG 16                 /*Configuration                     */
#define SSC$L_TODR 108                  /*Time-of-year                      */
#define SSC$L_TCR0 256                  /*Timer 0 control                   */
#define SSC$L_TIR0 260                  /*Timer 0 interval                  */
#define SSC$L_TNIR0 264                 /*Timer 0 next interval             */
#define SSC$L_TIVR0 268                 /*Timer 0 interrupt vector          */
#define SSC$L_TCR1 272                  /*Timer 1 control                   */
#define SSC$L_TIR1 276                  /*Timer 1 interval                  */
#define SSC$L_TNIR1 264                 /*Timer 1 next interval             */
#define SSC$L_TIVR1 268                 /*Timer 1 interrupt vector          */
#define SSC$B_RAM_START 1024            /*Start of SSC RAM                  */
#define SSC$B_RAM_END 2047              /*End of SSC RAM                    */
#define SSC$M_TCR_RUN 0x1
#define SSC$M_TCR_STP 0x4
#define SSC$M_TCR_XFR 0x10
#define SSC$M_TCR_SGL 0x20
#define SSC$M_TCR_IE 0x40
#define SSC$M_TCR_INT 0x80
#define SSC$M_TCR_ERR 0x80000000
	
typedef struct _tcr {
    unsigned ssc$v_tcr_run : 1;
    unsigned ssc$v_tcr_mbz_0 : 1;
    unsigned ssc$v_tcr_stp : 1;
    unsigned ssc$v_tcr_mbz_1 : 1;
    unsigned ssc$v_tcr_xfr : 1;
    unsigned ssc$v_tcr_sgl : 1;
    unsigned ssc$v_tcr_ie : 1;
    unsigned ssc$v_tcr_int : 1;
    unsigned ssc$v_tcr_mbz_2 : 23;
    unsigned ssc$v_tcr_err : 1;
    } TCR;
 
#pragma __member_alignment __restore
#ifdef __INITIAL_POINTER_SIZE			 /* Defined whenever ptr size pragmas supported */
#pragma __required_pointer_size __restore		 /* Restore the previously-defined required ptr size */
#endif
#ifdef __cplusplus
    }
#endif
#pragma __standard
 
#endif /* __SSCDEF_LOADED */