/***************************************************************************/ /** **/ /** HPE CONFIDENTIAL. This software is confidential proprietary software **/ /** licensed by Hewlett-Packard Enterprise Development, LP, and is not **/ /** authorized to be used, duplicated OR disclosed to anyone without the **/ /** prior written permission of HPE. **/ /** © 2023 Copyright Hewlett-Packard Enterprise Development, LP **/ /** **/ /** VMS SOFTWARE, INC. CONFIDENTIAL. This software is confidential **/ /** proprietary software licensed by VMS Software, Inc., and is not **/ /** authorized to be used, duplicated or disclosed to anyone without **/ /** the prior written permission of VMS Software, Inc. **/ /** © 2023 Copyright VMS Software, Inc. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 9-Nov-2023 12:06:34 by OpenVMS SDL V3.7 */ /* Source: 12-JAN-2021 13:06:59 $1$DGA8345:[LIB_H.SRC]PTEDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $PTEDEF ***/ #ifndef __PTEDEF_LOADED #define __PTEDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /*+ */ /* Define page table entry vields and values */ /*- */ #define PTE$C_BYTES_PER_PTE 8 /* Byte length of Page Table Entry */ #define PTE$C_SHIFT_SIZE 3 /* PTE size as a power of 2 */ /* */ /* Vield definition for "valid" PTEs */ /* */ /* PFN fields are intentionally aligned so that they can be used directly */ /* after masking off all of the other fields in a PTE. */ #define PTE$M_P 0x1 #define PTE$M_RW 0x2 #define PTE$M_US 0x4 #define PTE$M_PWT 0x8 #define PTE$M_PCD 0x10 #define PTE$M_A 0x20 #define PTE$M_D 0x40 #define PTE$M_PS 0x80 #define PTE$M_G 0x100 #define PTE$M_IGN9_11_COMMON 0xE00 #define PTE$M_PER_PTE_UNIQ 0xFFFFFFFFFF000 #define PTE$M_IGN52_58_COMMON 0x7F0000000000000 #define PTE$M_VMS_PROT 0x7800000000000000 #define PTE$M_XD 0x8000000000000000 #define PTE$M_COMMON_PML5E 0xFFF #define PTE$M_PML4_PFN 0xFFFFFFFFFF000 #define PTE$M_IGNPROTXD_PML45 0xFFF0000000000000 #define PTE$M_COMMON_PML4E 0xFFF #define PTE$M_PDPT_PFN 0xFFFFFFFFFF000 #define PTE$M_IGNPROTXD_PML4E 0xFFF0000000000000 #define PTE$M_COMMON_PDPTE1G 0xFFF #define PTE$M_PAT_PDPTE1G 0x1000 #define PTE$M_MBZ_PDPTE1G 0x3FFFE000 #define PTE$M_PFN_1G 0xFFFFFC0000000 #define PTE$M_IGNPROTXD_PDPTE1G 0xFFF0000000000000 #define PTE$M_COMMON_PDPTE 0xFFF #define PTE$M_PD_PFN 0xFFFFFFFFFF000 #define PTE$M_IGNPROTXD_PDPTE 0xFFF0000000000000 #define PTE$M_COMMON_PDE2MB 0xFFF #define PTE$M_PAT_PDE2MB 0x1000 #define PTE$M_MBZ_PDE2MB 0x1FE000 #define PTE$M_PFN_2MB 0xFFFFFFFE00000 #define PTE$M_IGNPROTXD_PDE2MB 0xFFF0000000000000 #define PTE$M_COMMON_PDE 0xFFF #define PTE$M_PT_PFN 0xFFFFFFFFFF000 #define PTE$M_IGNPROTXD_PDE 0xFFF0000000000000 #define PTE$M_COMMON_PTE_1 0x7F #define PTE$M_PAT_PTE 0x80 #define PTE$M_COMMON_PTE_2 0xF00 #define PTE$M_PFN_4K 0xFFFFFFFFFF000 #define PTE$M_IGNPROTXD_PTE 0xFFF0000000000000 #define PTE$M_VALID 0x1 #define PTE$M_COMMON_PFN_1 0x1FE #define PTE$M_FOR 0x200 #define PTE$M_FOW 0x400 #define PTE$M_FOE 0x800 #define PTE$M_NOT_PFN 0xFFFFFFFFFF000 #define PTE$M_SOFTWARE 0x7F0000000000000 #define PTE$M_COMMON_PFN_2 0xF800000000000000 #define PTE$M_PROT 0xF800000000000000 #define PTE$M_ASM 0x1 #define PTE$M_FILLER_1 0x3E #define PTE$M_MODIFY 0x40 #define PTE$M_FILLER_2 0x180 #define PTE$M_FILLER_3 0xFFFFFFFFFF000 #define PTE$M_OWN 0x30000000000000 #define PTE$M_CPY 0xC0000000000000 #define PTE$M_WINDOW 0x100000000000000 #define PTE$M_FILLER_4 0x600000000000000 #define PTE$M_READ_ONLY 0x1800000000000000 #define PTE$M_TYP0 0x100000000000000 #define PTE$M_PARTIAL_SECTION 0x200000000000000 #define PTE$M_TYP1 0x400000000000000 #define PTE$M_STX 0xFFFF000 #define PTE$M_CRF 0x10000000 #define PTE$M_DZRO 0x20000000 #define PTE$M_WRT 0x40000000 #define PTE$M_PGFLPAG 0xFFFFFF000 #define PTE$M_PGFLX 0xFF000000000 #define PTE$M_PGFLMAP 0xFFFFFFFF000 #define PTE$M_GPTX 0xFFFFFFFF000 #define PTE$M_BAKX 0xFFFFFFFFFF000 #define PTE$C_NOPGFLPAG 255 /*+ */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pte { #pragma __nomember_alignment __union { __struct { unsigned pte$v_p : 1; /* 1 => VALID [0] */ unsigned pte$v_rw : 1; /* 1 => writeable [1] */ unsigned pte$v_us : 1; /* 1 => User, 0 => Sys [2] */ unsigned pte$v_pwt : 1; /* Pg-lvl wrt-thru [3] */ unsigned pte$v_pcd : 1; /* pg-lvl cache dsabl [4] */ unsigned pte$v_a : 1; /* Accessed [5] */ unsigned pte$v_d : 1; /* Dirty [6] */ unsigned pte$v_ps : 1; /* Page Size [7] */ unsigned pte$v_g : 1; /* Global some forms [8] */ unsigned pte$v_ign9_11_common : 3; /* Ignored most forms [9-11] */ unsigned pte$v_per_pte_uniq_1 : 32; unsigned pte$v_per_pte_uniq_2 : 8; /* Varies by PTE [12-51] */ unsigned pte$v_ign52_58_common : 7; /* Ignored (Software) [52-58] */ unsigned pte$v_vms_prot : 4; /* VMS prot code [59-62] */ unsigned pte$v_xd : 1; /* Execute disable [63] */ } pte$r_common_bits; __struct { unsigned pte$v_common_pml5e : 12; /* Commmon overlay [0-11] */ /* Note: Bit 7 MBZ in this form */ #if defined(__VAXC) unsigned pte$v_pml4_pfn_1 : 32; unsigned pte$v_pml4_pfn_2 : 8; #else unsigned __int64 pte$v_pml4_pfn : 40; /* PFN of 4K pg for PML4 [12-51] */ #endif unsigned pte$v_ignprotxd_pml45 : 12; /* Common overlay [52-63] */ } pte$r_pml5e_bits; __struct { unsigned pte$v_common_pml4e : 12; /* Commmon overlay [0-11] */ /* Note: Bit 7 MBZ in this form */ #if defined(__VAXC) unsigned pte$v_pdpt_pfn_1 : 32; unsigned pte$v_pdpt_pfn_2 : 8; #else unsigned __int64 pte$v_pdpt_pfn : 40; /* PFN of 4K pg for PDPT or 1GB pg [12-51] */ #endif unsigned pte$v_ignprotxd_pml4e : 12; /* Common overlay [52-63] */ } pte$r_pml4e_bits; __struct { unsigned pte$v_common_pdpte1g : 12; /* Commmon overlay [0-11] */ /* Note: Bit 7 (PS) = 1 in this form */ unsigned pte$v_pat_pdpte1g : 1; /* PAT [12] */ unsigned pte$v_mbz_pdpte1g : 17; /* Must Be Zero [13-29] */ unsigned pte$v_pfn_1g : 22; /* PFN of 1GB pg [30-51] */ unsigned pte$v_ignprotxd_pdpte1g : 12; /* Common overlay [52-63] */ } pte$r_pdpte1g_bits; __struct { unsigned pte$v_common_pdpte : 12; /* Commmon overlay [0-11] */ /* Note: Bit 6 (D) ignored in this form */ /* Note: Bit 7 (PS) = 0 in this form */ /* Note: Bit 8 (G) ignored in this form */ #if defined(__VAXC) unsigned pte$v_pd_pfn_1 : 32; unsigned pte$v_pd_pfn_2 : 8; #else unsigned __int64 pte$v_pd_pfn : 40; /* PFN of 4K pg for PD or 2MB pg [12-51] */ #endif unsigned pte$v_ignprotxd_pdpte : 12; /* Common overlay [52-63] */ } pte$r_pdpte_bits; __struct { unsigned pte$v_common_pde2mb : 12; /* Commmon overlay [0-11] */ /* Note: Bit 7 (PS) = 1 in this form */ unsigned pte$v_pat_pde2mb : 1; /* PAT [12] */ unsigned pte$v_mbz_pde2mb : 8; /* Must Be Zero [13-20] */ unsigned pte$v_pfn_2mb : 31; /* PFN of 2MB pg [21-51] */ unsigned pte$v_ignprotxd_pde2mb : 12; /* Common overlay [52-63] */ } pte$r_pde2mb_bits; __struct { unsigned pte$v_common_pde : 12; /* Commmon overlay [0-11] */ /* Note: Bit 6 (D) ignored in this form */ /* Note: Bit 7 (PS) = 0 in this form */ /* Note: Bit 8 (G) ignored in this form */ #if defined(__VAXC) unsigned pte$v_pt_pfn_1 : 32; unsigned pte$v_pt_pfn_2 : 8; #else unsigned __int64 pte$v_pt_pfn : 40; /* PFN of 4KB pg for PT [12-51] */ #endif unsigned pte$v_ignprotxd_pde : 12; /* Common overlay [52-63] */ } pte$r_pde_bits; __struct { unsigned pte$v_common_pte_1 : 7; /* Commmon overlay [0-6] */ unsigned pte$v_pat_pte : 1; /* PAT [7] */ unsigned pte$v_common_pte_2 : 4; /* Commmon overlay [8-11] */ #if defined(__VAXC) unsigned pte$v_pfn_4k_1 : 32; unsigned pte$v_pfn_4k_2 : 8; #else unsigned __int64 pte$v_pfn_4k : 40; /* PFN of 4KB pg [12-51] */ #endif unsigned pte$v_ignprotxd_pte : 12; /* Common overlay [52-63] */ } pte$r_pte_bits; __struct { unsigned pte$v_valid : 1; /* [0] VALID bit = Present */ unsigned pte$v_common_pfn_1 : 8; /* [1-8] */ unsigned pte$v_for : 1; /* [9] Fault On Read */ unsigned pte$v_fow : 1; /* [10] Fault On Write */ unsigned pte$v_foe : 1; /* [11] Fault On Execute */ unsigned pte$v_not_pfn_1 : 32; unsigned pte$v_not_pfn_2 : 8; /* [12-51] Must know what kind of PTE */ /* to know size of PFN. Use */ /* specific PFN fields declared */ /* above. */ unsigned pte$v_software : 7; /* [52-58] */ unsigned pte$v_common_pfn_2 : 5; /* [59-63] PROT and XD */ } pte$r_ptedef_bits0; __struct { unsigned pte$v_filler_1_1 : 32; unsigned pte$v_filler_1_2 : 27; unsigned pte$v_prot : 5; /* Protection code and XD bit */ } pte$r_ptedef_prot; __struct { unsigned pte$v_asm : 1; /* [0] Obsolete on x86 */ /* (ASM can only be set if valid is set */ /* so, we use this trick for porting) */ /* This came from IA64. Do we need this for x86? */ unsigned pte$v_filler_1 : 5; /* [1-5] */ unsigned pte$v_modify : 1; /* [6] hardware dirty bit */ unsigned pte$v_filler_2 : 2; /* [7-8] */ unsigned pte$v_fault_bits : 3; /* [9-11] For SDA */ unsigned pte$v_filler_3_1 : 32; unsigned pte$v_filler_3_2 : 8; /* [12-51] */ unsigned pte$v_own : 2; /* [52-53] Page Owner Mode */ unsigned pte$v_cpy : 2; /* [54-55] Copy characteristic */ unsigned pte$v_window : 1; /* [56] Windowed Page Bit */ unsigned pte$v_filler_4 : 2; /* [57-58] */ unsigned pte$v_read_only : 2; /* [59-60] Read only prot if low 2 bits set. */ unsigned pte$v_fill_0_ : 3; } pte$r_ptedef_swbits; /* */ /* Vield definitions for various invalid forms of PTE */ /* */ __struct { unsigned pte$v_filler_22_1 : 32; unsigned pte$v_filler_22_2 : 24; /* [0-55] skip hardware bits */ unsigned pte$v_typ0 : 1; /* [56] TYP0 Bit */ unsigned pte$v_partial_section : 1; /* [57] Only part of page maps to section */ unsigned pte$v_typ1 : 1; /* [58] TYP1 Bit */ unsigned pte$v_fill_1_ : 5; } pte$r_ptedef_bits1; __union { __struct { unsigned pte$v_filler_5 : 12; /* [0-11] skip to PFN field. Not marked 'fill' for SDA */ unsigned pte$v_stx : 16; /* [A/I=32-47, x86=12-27] Section Table Index */ unsigned pte$v_crf : 1; /* [A/I=48, x86=28] Copy on Reference */ unsigned pte$v_dzro : 1; /* [A/I=49, x86=29] Demand Zero */ unsigned pte$v_wrt : 1; /* [A/I=50, x86=30] Section file accessed for write */ unsigned pte$v_filler_17 : 21; /* [31-51] Not marked 'fill' for SDA */ unsigned pte$v_filler_18 : 12; /* [52-63] Overlays protection etc. */ } pte$r_stx_bits; __struct { unsigned pte$v_filler_6 : 12; /* [0-11] skip to PGFLPAG field. Not marked 'fill' for SDA */ unsigned pte$v_pgflpag : 24; /* [A/I=32-55, x86=12-35] Page File Page Number (not a VBN) */ unsigned pte$v_pgflx : 8; /* [A/I=56-63, x86=36-43] System page file index */ unsigned pte$v_filler_19 : 20; /* [44-63] Not marked 'fill' for SDA */ } pte$r_bak_pgfl; __struct { unsigned pte$v_filler_16 : 12; /* [0-11] skip to PGFLMAP field */ unsigned pte$v_pgflmap : 32; /* Page file page number and index */ unsigned pte$v_fill_2_ : 4; } pte$r_bak_pgflmap; __struct { unsigned pte$v_filler_8 : 12; /* [0-11] skip to GPTX field */ unsigned pte$v_gptx : 32; /* Global Page Table Index */ unsigned pte$v_fill_3_ : 4; } pte$r_gptx_overlay; __struct { unsigned pte$v_filler_7 : 12; /* [0-11] skip to PFN field */ #if defined(__VAXC) unsigned pte$v_bakx_1 : 32; unsigned pte$v_bakx_2 : 8; #else unsigned __int64 pte$v_bakx : 40; /* Backup Address (uninterpreted) */ #endif unsigned pte$v_fill_4_ : 4; } pte$r_bakx_bits; } pte$r_ptedef_pfn; __union { unsigned __int64 pte$q_entry; /* The entire page table entry */ } pte$r_ptedef_entry_qw; __struct { unsigned int pte$l_entry_l; /* The low longword of the PTE */ unsigned int pte$l_entry_h; /* The high longword of the PTE */ } pte$r_ptedef_entry_lw; } pte$r_pte_union; /*+ */ /* Define a constant indicating "no pagefile page assigned": all bits set in PGFLX */ /*- */ /* Protection field definitions. These protection encodings provide */ /* a way to express page protection using VAX-like protection symbols. */ /*- */ /*+ */ /* OWNer mode field definitions */ /* */ /* These constants are not meant to be shifted into the owner field. They */ /* incorporate ownership information as a bitmask relative to the start of */ /* a PTE already. */ /*_ */ /*+ */ /* CoPY field definitions */ /* */ /* These constants are not meant to be shifted into the copy characteristic */ /* field. They incorporate copy characteristic information relative to the */ /* start of a PTE already. */ /*_ */ /*+ */ /* Demand zero PTE defintions for L1 and L2 PTEs */ /*- */ } PTE; #if !defined(__VAXC) #define pte$v_p pte$r_pte_union.pte$r_common_bits.pte$v_p #define pte$v_rw pte$r_pte_union.pte$r_common_bits.pte$v_rw #define pte$v_us pte$r_pte_union.pte$r_common_bits.pte$v_us #define pte$v_pwt pte$r_pte_union.pte$r_common_bits.pte$v_pwt #define pte$v_pcd pte$r_pte_union.pte$r_common_bits.pte$v_pcd #define pte$v_a pte$r_pte_union.pte$r_common_bits.pte$v_a #define pte$v_d pte$r_pte_union.pte$r_common_bits.pte$v_d #define pte$v_ps pte$r_pte_union.pte$r_common_bits.pte$v_ps #define pte$v_g pte$r_pte_union.pte$r_common_bits.pte$v_g #define pte$v_vms_prot pte$r_pte_union.pte$r_common_bits.pte$v_vms_prot #define pte$v_xd pte$r_pte_union.pte$r_common_bits.pte$v_xd #define pte$v_pml4_pfn pte$r_pte_union.pte$r_pml5e_bits.pte$v_pml4_pfn #define pte$v_pdpt_pfn pte$r_pte_union.pte$r_pml4e_bits.pte$v_pdpt_pfn #define pte$v_pat_pdpte1g pte$r_pte_union.pte$r_pdpte1g_bits.pte$v_pat_pdpte1g #define pte$v_mbz_pdpte1g pte$r_pte_union.pte$r_pdpte1g_bits.pte$v_mbz_pdpte1g #define pte$v_pfn_1g pte$r_pte_union.pte$r_pdpte1g_bits.pte$v_pfn_1g #define pte$v_pd_pfn pte$r_pte_union.pte$r_pdpte_bits.pte$v_pd_pfn #define pte$v_pat_pde2mb pte$r_pte_union.pte$r_pde2mb_bits.pte$v_pat_pde2mb #define pte$v_mbz_pde2mb pte$r_pte_union.pte$r_pde2mb_bits.pte$v_mbz_pde2mb #define pte$v_pfn_2mb pte$r_pte_union.pte$r_pde2mb_bits.pte$v_pfn_2mb #define pte$v_pt_pfn pte$r_pte_union.pte$r_pde_bits.pte$v_pt_pfn #define pte$v_pat_pte pte$r_pte_union.pte$r_pte_bits.pte$v_pat_pte #define pte$v_pfn_4k pte$r_pte_union.pte$r_pte_bits.pte$v_pfn_4k #define pte$v_valid pte$r_pte_union.pte$r_ptedef_bits0.pte$v_valid #define pte$v_for pte$r_pte_union.pte$r_ptedef_bits0.pte$v_for #define pte$v_fow pte$r_pte_union.pte$r_ptedef_bits0.pte$v_fow #define pte$v_foe pte$r_pte_union.pte$r_ptedef_bits0.pte$v_foe #define pte$v_software pte$r_pte_union.pte$r_ptedef_bits0.pte$v_software #define pte$v_prot pte$r_pte_union.pte$r_ptedef_prot.pte$v_prot #define pte$v_asm pte$r_pte_union.pte$r_ptedef_swbits.pte$v_asm #define pte$v_modify pte$r_pte_union.pte$r_ptedef_swbits.pte$v_modify #define pte$v_fault_bits pte$r_pte_union.pte$r_ptedef_swbits.pte$v_fault_bits #define pte$v_own pte$r_pte_union.pte$r_ptedef_swbits.pte$v_own #define pte$v_cpy pte$r_pte_union.pte$r_ptedef_swbits.pte$v_cpy #define pte$v_window pte$r_pte_union.pte$r_ptedef_swbits.pte$v_window #define pte$v_read_only pte$r_pte_union.pte$r_ptedef_swbits.pte$v_read_only #define pte$v_typ0 pte$r_pte_union.pte$r_ptedef_bits1.pte$v_typ0 #define pte$v_partial_section pte$r_pte_union.pte$r_ptedef_bits1.pte$v_partial_section #define pte$v_typ1 pte$r_pte_union.pte$r_ptedef_bits1.pte$v_typ1 #define pte$v_filler_5 pte$r_pte_union.pte$r_ptedef_pfn.pte$r_stx_bits.pte$v_filler_5 #define pte$v_stx pte$r_pte_union.pte$r_ptedef_pfn.pte$r_stx_bits.pte$v_stx #define pte$v_crf pte$r_pte_union.pte$r_ptedef_pfn.pte$r_stx_bits.pte$v_crf #define pte$v_dzro pte$r_pte_union.pte$r_ptedef_pfn.pte$r_stx_bits.pte$v_dzro #define pte$v_wrt pte$r_pte_union.pte$r_ptedef_pfn.pte$r_stx_bits.pte$v_wrt #define pte$v_filler_17 pte$r_pte_union.pte$r_ptedef_pfn.pte$r_stx_bits.pte$v_filler_17 #define pte$v_filler_6 pte$r_pte_union.pte$r_ptedef_pfn.pte$r_bak_pgfl.pte$v_filler_6 #define pte$v_pgflpag pte$r_pte_union.pte$r_ptedef_pfn.pte$r_bak_pgfl.pte$v_pgflpag #define pte$v_pgflx pte$r_pte_union.pte$r_ptedef_pfn.pte$r_bak_pgfl.pte$v_pgflx #define pte$v_filler_19 pte$r_pte_union.pte$r_ptedef_pfn.pte$r_bak_pgfl.pte$v_filler_19 #define pte$v_pgflmap pte$r_pte_union.pte$r_ptedef_pfn.pte$r_bak_pgflmap.pte$v_pgflmap #define pte$v_gptx pte$r_pte_union.pte$r_ptedef_pfn.pte$r_gptx_overlay.pte$v_gptx #define pte$v_bakx pte$r_pte_union.pte$r_ptedef_pfn.pte$r_bakx_bits.pte$v_bakx #define pte$q_entry pte$r_pte_union.pte$r_ptedef_entry_qw.pte$q_entry #define pte$l_entry_l pte$r_pte_union.pte$r_ptedef_entry_lw.pte$l_entry_l #define pte$l_entry_h pte$r_pte_union.pte$r_ptedef_entry_lw.pte$l_entry_h #endif /* #if !defined(__VAXC) */ #if defined(__alpha) || defined(__ia64) /* Verified for x86 port - Gregory H. Jordan */ typedef int PROTO_PTE; /* Maintain PROTO_PTE as an int for compatibility on Alpha and IA64 */ #else typedef unsigned __int64 PROTO_PTE; /* Proto PTE must be 64 bits on X86 */ #endif #define PTE$M_FREE_PTE_MBZ1 0x1 #define PTE$M_FREE_PTE_MBZ2 0x30000000000000 #define PTE$M_SINGLE_PTE 0x40000000000000 #define PTE$M_FREE_PTE_MBZ3 0xFF80000000000000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _va_pte_free { #pragma __nomember_alignment __union { unsigned __int64 pte$iq_index; /* PTE index field. For historic reasons, index field is defined */ __struct { unsigned pte$v_filler_20 : 1; #if defined(__VAXC) unsigned pte$v_index1_1 : 32; unsigned pte$v_index1_2 : 19; #else unsigned __int64 pte$v_index1 : 51; /* Bits <1:51> Is the Index */ #endif unsigned pte$v_fill_5_ : 4; } pte$r_va_pte_index_struct; __struct { /* as a quadword. Actual index lives in bits <63:19> of the */ unsigned pte$v_free_pte_mbz1 : 1; /* Bit <0:0> are MBZ. */ #if defined(__VAXC) unsigned pte$v_filler_x2_1 : 32; unsigned pte$v_filler_x2_2 : 19; #else unsigned __int64 pte$v_filler_x2 : 51; #endif unsigned pte$v_free_pte_mbz2 : 2; /* Bits <52:53> are MBZ in order for code to distinguish between a */ unsigned pte$v_single_pte : 1; /* Bit <54> denotes that the element contains a single PTE */ unsigned pte$v_free_pte_mbz3 : 9; /* Bits <55:63> are MBZ */ } pte$r_va_pte_free_struct; /* free PTE and a GPTE */ } pte$r_va_pte_free_union; __union { unsigned __int64 pte$iq_free_count_qw; /* Quadword containg free count. */ __struct { /* Counts lives in bits <63:8> of the quadword */ unsigned pte$v_filler_14 : 8; #if defined(__VAXC) unsigned pte$v_free_count_1 : 32; unsigned pte$v_free_count_2 : 24; #else unsigned __int64 pte$v_free_count : 56; #endif } pte$r_va_pte_free_struct2; /* free PTE and a GPTE */ } pte$r_va_pte_free_union2; } VA_PTE_FREE; #if !defined(__VAXC) #define pte$iq_index pte$r_va_pte_free_union.pte$iq_index #define pte$v_index1 pte$r_va_pte_free_union.pte$r_va_pte_index_struct.pte$v_index1 #define pte$v_free_pte_mbz1 pte$r_va_pte_free_union.pte$r_va_pte_free_struct.pte$v_free_pte_mbz1 #define pte$v_filler_x2 pte$r_va_pte_free_union.pte$r_va_pte_free_struct.pte$v_filler_x2 #define pte$v_free_pte_mbz2 pte$r_va_pte_free_union.pte$r_va_pte_free_struct.pte$v_free_pte_mbz2 #define pte$v_single_pte pte$r_va_pte_free_union.pte$r_va_pte_free_struct.pte$v_single_pte #define pte$v_free_pte_mbz3 pte$r_va_pte_free_union.pte$r_va_pte_free_struct.pte$v_free_pte_mbz3 #define pte$iq_free_count_qw pte$r_va_pte_free_union2.pte$iq_free_count_qw #define pte$v_free_count pte$r_va_pte_free_union2.pte$r_va_pte_free_struct2.pte$v_free_count #endif /* #if !defined(__VAXC) */ #define PTE$S_PTEDEF 16 /* Old PTE size constant for compatibility */ /* */ /* */ /* Define a constant that's used to shift the index value into the */ /* appropriate bits of the index quadword of the VA_PTE_FREE structure. */ /* */ #define PTE$C_INDEX_SHIFT_VALUE 1 #define PTE$C_FREE_BLOCK 16 /* Byte length of VA_PTE free block. */ /* Head of a private list of free PTEs */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _ptelist { #pragma __nomember_alignment unsigned __int64 ptelist$q_head; /* PTE index of head and tail element */ unsigned __int64 ptelist$q_tail; /* in free list; same format as in VA_PTE_FREE */ __int64 ptelist$q_count; /* count of free PTEs in this list */ } PTELIST; #define PTELIST$K_LENGTH 24 /* length of block; */ #define PTELIST$C_LENGTH 24 /* length of block; */ /*+ */ /* These constants are not meant to be shifted into the PROT position. */ /* They incorporate protection information as bitmasks relative to the */ /* start of a PTE already. In other words, they can be ORed into a */ /* zeroed PROT field. */ /* */ /* SDL does not have support for constants larger than 32 bits. So we */ /* have to drop down into language-specific coding. C, MACRO, and */ /* BLISS-64 handle them. For BLISS-32, they are defined relative */ /* to the upper longword of a PTE. */ /*- */ #define PTE$C_NA (0x00ull << 59) /* No Access */ #define PTE$C_KR (0x03ull << 59) /* Kernel Read only (execute) */ #define PTE$C_ER (0x07ull << 59) /* Exec Read only (execute) */ #define PTE$C_SR (0x0Bull << 59) /* Super Read only (execute) */ #define PTE$C_UR (0x0Full << 59) /* User Read only (execute) */ #define PTE$C_KW (0x12ull << 59) /* Kernel Write (no execute) */ #define PTE$C_EW (0x15ull << 59) /* Exec Write (no execute) */ #define PTE$C_SW (0x18ull << 59) /* Super Write (no execute) */ #define PTE$C_UW (0x14ull << 59) /* User Write (no execute) */ #define PTE$C_ERKW (0x16ull << 59) /* Exec Read Kernel Write (no execute) */ #define PTE$C_SRKW (0x1Aull << 59) /* Super Read Kernel Write (no execute) */ #define PTE$C_SREW (0x19ull << 59) /* Super Read Exec Write (no execute) */ #define PTE$C_URKW (0x1Eull << 59) /* User Read Kernel Write (no execute) */ #define PTE$C_UREW (0x1Dull << 59) /* User Read Exec Write (no execute) */ #define PTE$C_URSW (0x1Cull << 59) /* User Read Super Write (no execute) */ #define PTE$C_KRO (0x13ull << 59) /* Kernel Read only (no execute) */ #define PTE$C_ERO (0x17ull << 59) /* Exec Read only (no execute) */ #define PTE$C_SRO (0x1Bull << 59) /* Super Read only (no execute) */ #define PTE$C_URO (0x1Full << 59) /* User Read only (no execute) */ #define PTE$C_KWX (0x02ull << 59) /* Kernel Write (execute) */ #define PTE$C_EWX (0x05ull << 59) /* Exec Write (execute) */ #define PTE$C_SWX (0x08ull << 59) /* Super Write (execute) */ #define PTE$C_UWX (0x04ull << 59) /* User Write (execute) */ #define PTE$C_ERKWX (0x06ull << 59) /* Exec Read Kernel Write (execute) */ #define PTE$C_SRKWX (0x0Aull << 59) /* Super Read Kernel Write (execute) */ #define PTE$C_SREWX (0x09ull << 59) /* Super Read Exec Write (execute) */ #define PTE$C_URKWX (0x0Eull << 59) /* User Read Kernel Write (execute) */ #define PTE$C_UREWX (0x0Dull << 59) /* User Read Exec Write (execute) */ #define PTE$C_URSWX (0x0Cull << 59) /* User Read Super Write (execute) */ #define PTE$C_KOWN (0x0ull << 52) /* Kernel Owner Mode */ #define PTE$C_EOWN (0x1ull << 52) /* Executive Owner Mode */ #define PTE$C_SOWN (0x2ull << 52) /* Supervisor Owner Mode */ #define PTE$C_UOWN (0x3ull << 52) /* User Owner Mode */ #define PTE$C_COPY (0x0ull << 54) /* Copy */ #define PTE$C_NOCOPY (0x1ull << 54) /* No copy */ #define PTE$C_DZRO (0x2ull << 54) /* Copy as DZRO */ #define PTE$C_DZRO_PT_PTE PTE$C_KW /* Kernel write, no execute */ #define PTE$C_DZRO_PDPT_PTE PTE$C_KW /* Kernel write, no execute */ #ifdef __INITIAL_POINTER_SIZE #pragma __required_pointer_size __save /* Save current pointer size */ #pragma __required_pointer_size __long /* Pointers are 64-bit */ typedef struct _pte * PTE_PQ; /* Pointer to a PTE structure. */ typedef struct _pte ** PTE_PPQ; /* Pointer to a pointer to a PTE structure. */ typedef struct _ptelist * PTELIST_PQ; /* Pointer to a PTELIST structure. */ typedef struct _ptelist ** PTELIST_PPQ; /* Pointer to a pointer to a PTELIST structure. */ typedef struct _va_pte_free * VA_PTE_FREE_PQ; /* Pointer to a free VA_PTE structure. */ typedef struct _va_pte_free ** VA_PTE_FREE_PPQ; /* Pointer to a pointer to a free VA_PTE structure. */ #pragma __required_pointer_size __restore /* Return to previous pointer size */ #else typedef unsigned __int64 PTE_PQ; typedef unsigned __int64 PTE_PPQ; typedef unsigned __int64 PTELIST_PQ; typedef unsigned __int64 PTELIST_PPQ; typedef unsigned __int64 VA_PTE_FREE_PQ; typedef unsigned __int64 VA_PTE_FREE_PPQ; #endif /* __INITIAL_POINTER_SIZE */ /* We need a PTE$S_PFN for C... */ #define PTE$S_PFN 40 /* Size of page tables on X86 */ /* */ /* The sizes can not be expressed in bliss32 and will be equated to zero. */ /*+ */ /* Define constant to with the number of PTEs and the PFN incremetns for 8K pages */ /*- */ #define PTE$C_PFN_INCR 2 /* Increment PFNs by 2 on X86 per 8k page */ #define PTE$C_PAGE_INCR 2 /* 2 PTEs per 8K page on X86 */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __PTEDEF_LOADED */