/***************************************************************************/ /** **/ /** HPE CONFIDENTIAL. This software is confidential proprietary software **/ /** licensed by Hewlett-Packard Enterprise Development, LP, and is not **/ /** authorized to be used, duplicated OR disclosed to anyone without the **/ /** prior written permission of HPE. **/ /** © 2023 Copyright Hewlett-Packard Enterprise Development, LP **/ /** **/ /** VMS SOFTWARE, INC. CONFIDENTIAL. This software is confidential **/ /** proprietary software licensed by VMS Software, Inc., and is not **/ /** authorized to be used, duplicated or disclosed to anyone without **/ /** the prior written permission of VMS Software, Inc. **/ /** © 2023 Copyright VMS Software, Inc. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 9-Nov-2023 12:06:54 by OpenVMS SDL V3.7 */ /* Source: 15-SEP-2003 13:54:22 $1$DGA8345:[LIB_H.SRC]ISRDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $ISRDEF ***/ #ifndef __ISRDEF_LOADED #define __ISRDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /* */ /* Definitions for Interruption Status Register */ /* */ #define ISR$M_CODE 0xFFFF #define ISR$M_SHORT_CODE 0xF #define ISR$M_SHORT_CODE4_7 0xF0 #define ISR$M_HIGH_CODE 0xFF00 #define ISR$M_FD_DFL 0x1 #define ISR$M_FD_DFH 0x2 #define ISR$M_FF_VH 0x1 #define ISR$M_FF_DH 0x2 #define ISR$M_FF_ZH 0x4 #define ISR$M_FF_SWAH 0x8 #define ISR$M_FF_VL 0x10 #define ISR$M_FF_DL 0x20 #define ISR$M_FF_ZL 0x40 #define ISR$M_FF_SWAL 0x80 #define ISR$M_FT_FP 0x1 #define ISR$M_FT_MBZ1 0x2 #define ISR$M_FT_MBZ2 0x4 #define ISR$M_FT_SS 0x8 #define ISR$M_FT_MBZ4 0x10 #define ISR$M_FT_MBZ5 0x20 #define ISR$M_FT_MBZ6 0x40 #define ISR$M_FT_OL 0x80 #define ISR$M_FT_UL 0x100 #define ISR$M_FT_IL 0x200 #define ISR$M_FT_FPAL 0x400 #define ISR$M_FT_OH 0x800 #define ISR$M_FT_UH 0x1000 #define ISR$M_FT_IH 0x2000 #define ISR$M_FT_FPAH 0x4000 #define ISR$M_FP 0x1 #define ISR$M_LP 0x2 #define ISR$M_TB 0x4 #define ISR$M_SS 0x8 #define ISR$M_UI 0x10 #define ISR$M_FILL1 0xFFE0 #define ISR$M_VECTOR 0xFF0000 #define ISR$M_MBZ0 0xFF000000 #define ISR$M_X 0x100000000 #define ISR$M_W 0x200000000 #define ISR$M_R 0x400000000 #define ISR$M_NA 0x800000000 #define ISR$M_SP 0x1000000000 #define ISR$M_RS 0x2000000000 #define ISR$M_IR 0x4000000000 #define ISR$M_NI 0x8000000000 #define ISR$M_SO 0x10000000000 #define ISR$M_EI 0x60000000000 #define ISR$M_ED 0x80000000000 #define ISR$M_MBZ2 0xFFFFF00000000000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _isr { #pragma __nomember_alignment __union { unsigned __int64 isr$q_interruption_status; __struct { __union { unsigned isr$v_code : 16; /* 0 Interruption Code */ __struct { unsigned isr$v_short_code : 4; /* Low 4 bits of code, aka code(3:0) */ unsigned isr$v_short_code4_7 : 4; /* Next 4 bits of code, aka code(4:7) */ unsigned isr$v_high_code : 8; /* In case anyone uses this separately */ } isr$r_short_code_bits; __struct { /* Floating-point disabled status bits */ unsigned isr$v_fd_dfl : 1; /* Fault came from low FP registers disabled */ unsigned isr$v_fd_dfh : 1; /* Fault camae from high FP registers disabled */ unsigned isr$v_fill_0_ : 6; } isr$r_float_disabled_bits; __struct { /* Floating-point fault status bits */ unsigned isr$v_ff_vh : 1; unsigned isr$v_ff_dh : 1; unsigned isr$v_ff_zh : 1; unsigned isr$v_ff_swah : 1; unsigned isr$v_ff_vl : 1; unsigned isr$v_ff_dl : 1; unsigned isr$v_ff_zl : 1; unsigned isr$v_ff_swal : 1; } isr$r_float_fault_bits; __struct { /* Floating-point trap status bits */ unsigned isr$v_ft_fp : 1; unsigned isr$v_ft_mbz1 : 1; unsigned isr$v_ft_mbz2 : 1; unsigned isr$v_ft_ss : 1; unsigned isr$v_ft_mbz4 : 1; unsigned isr$v_ft_mbz5 : 1; unsigned isr$v_ft_mbz6 : 1; unsigned isr$v_ft_ol : 1; unsigned isr$v_ft_ul : 1; unsigned isr$v_ft_il : 1; unsigned isr$v_ft_fpal : 1; unsigned isr$v_ft_oh : 1; unsigned isr$v_ft_uh : 1; unsigned isr$v_ft_ih : 1; unsigned isr$v_ft_fpah : 1; unsigned isr$v_fill_1_ : 1; } isr$r_float_trap_bits; __struct { /* Various trap bits */ unsigned isr$v_fp : 1; /* Floating point exception */ unsigned isr$v_lp : 1; /* Lower privilege transfer trap */ unsigned isr$v_tb : 1; /* Taken branch trap */ unsigned isr$v_ss : 1; /* Single step trap */ unsigned isr$v_ui : 1; /* Unimplemented instruction address trap */ unsigned isr$v_fill1 : 11; } isr$r_trap_bits; } isr$r_code_overlay; unsigned isr$v_vector : 8; /* 16 IA-32 exception/interception vector number */ unsigned isr$v_mbz0 : 8; /* 24 Reserved ISR{31:24} (MBZ) */ unsigned isr$v_x : 1; /* 32 Execute excpetion */ unsigned isr$v_w : 1; /* 33 Write exception */ unsigned isr$v_r : 1; /* 34 Read exception */ unsigned isr$v_na : 1; /* 35 Non-access exception */ unsigned isr$v_sp : 1; /* 36 Speculative load exception */ unsigned isr$v_rs : 1; /* 37 Register Stack frame */ unsigned isr$v_ir : 1; /* 38 Incomplete Register frame */ unsigned isr$v_ni : 1; /* 39 Nested interruption */ unsigned isr$v_so : 1; /* 40 IA-32 Supervisor Override */ unsigned isr$v_ei : 2; /* 41 Excepting IA-64 instruction slot number */ unsigned isr$v_ed : 1; /* 43 Exception Deferral */ unsigned isr$v_mbz2 : 20; /* 44 Reserved ISR{63:44} */ } isr$r_isrdef_bits; } isr$r_isr_union; } ISR; #if !defined(__VAXC) #define isr$q_interruption_status isr$r_isr_union.isr$q_interruption_status #define isr$v_code isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$v_code #define isr$v_short_code isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_short_code_bits.isr$v_short_code #define isr$v_short_code4_7 isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_short_code_bits.isr$v_short_code4_7 #define isr$v_high_code isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_short_code_bits.isr$v_high_code #define isr$v_fd_dfl isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_disabled_bits.isr$v_fd_dfl #define isr$v_fd_dfh isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_disabled_bits.isr$v_fd_dfh #define isr$v_ff_vh isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_fault_bits.isr$v_ff_vh #define isr$v_ff_dh isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_fault_bits.isr$v_ff_dh #define isr$v_ff_zh isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_fault_bits.isr$v_ff_zh #define isr$v_ff_swah isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_fault_bits.isr$v_ff_swah #define isr$v_ff_vl isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_fault_bits.isr$v_ff_vl #define isr$v_ff_dl isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_fault_bits.isr$v_ff_dl #define isr$v_ff_zl isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_fault_bits.isr$v_ff_zl #define isr$v_ff_swal isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_fault_bits.isr$v_ff_swal #define isr$v_ft_fp isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_fp #define isr$v_ft_mbz1 isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_mbz1 #define isr$v_ft_mbz2 isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_mbz2 #define isr$v_ft_ss isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_ss #define isr$v_ft_mbz4 isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_mbz4 #define isr$v_ft_mbz5 isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_mbz5 #define isr$v_ft_mbz6 isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_mbz6 #define isr$v_ft_ol isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_ol #define isr$v_ft_ul isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_ul #define isr$v_ft_il isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_il #define isr$v_ft_fpal isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_fpal #define isr$v_ft_oh isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_oh #define isr$v_ft_uh isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_uh #define isr$v_ft_ih isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_ih #define isr$v_ft_fpah isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_float_trap_bits.isr$v_ft_fpah #define isr$v_fp isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_trap_bits.isr$v_fp #define isr$v_lp isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_trap_bits.isr$v_lp #define isr$v_tb isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_trap_bits.isr$v_tb #define isr$v_ss isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_trap_bits.isr$v_ss #define isr$v_ui isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_trap_bits.isr$v_ui #define isr$v_fill1 isr$r_isr_union.isr$r_isrdef_bits.isr$r_code_overlay.isr$r_trap_bits.isr$v_fill1 #define isr$v_vector isr$r_isr_union.isr$r_isrdef_bits.isr$v_vector #define isr$v_mbz0 isr$r_isr_union.isr$r_isrdef_bits.isr$v_mbz0 #define isr$v_x isr$r_isr_union.isr$r_isrdef_bits.isr$v_x #define isr$v_w isr$r_isr_union.isr$r_isrdef_bits.isr$v_w #define isr$v_r isr$r_isr_union.isr$r_isrdef_bits.isr$v_r #define isr$v_na isr$r_isr_union.isr$r_isrdef_bits.isr$v_na #define isr$v_sp isr$r_isr_union.isr$r_isrdef_bits.isr$v_sp #define isr$v_rs isr$r_isr_union.isr$r_isrdef_bits.isr$v_rs #define isr$v_ir isr$r_isr_union.isr$r_isrdef_bits.isr$v_ir #define isr$v_ni isr$r_isr_union.isr$r_isrdef_bits.isr$v_ni #define isr$v_so isr$r_isr_union.isr$r_isrdef_bits.isr$v_so #define isr$v_ei isr$r_isr_union.isr$r_isrdef_bits.isr$v_ei #define isr$v_ed isr$r_isr_union.isr$r_isrdef_bits.isr$v_ed #define isr$v_mbz2 isr$r_isr_union.isr$r_isrdef_bits.isr$v_mbz2 #endif /* #if !defined(__VAXC) */ /* ISR codes, for general exceptions: ISR{3:0} */ #define ISR$C_ILLEGAL_OP 0 /* Illegal operation fault */ #define ISR$C_PRIV_OP 1 /* Privileged operation fault */ #define ISR$C_PRIV_REG 2 /* Privileged register faults */ #define ISR$C_RESVD_REG 3 /* Privileged operation fault */ #define ISR$C_ILLEGAL_ISA 4 /* Disabled instruction set transition fault */ /* ISR codes, for non-access instructions ISR{3:0} */ #define ISR$C_TPA 0 /* Translate physical */ #define ISR$C_FC 1 /* Flush cache */ #define ISR$C_PROBE 2 /* Non-faulting probe */ #define ISR$C_TAK 3 /* Translation access key */ #define ISR$C_LFETCH 4 /* Line fetch (faulting and non-faulting) */ #define ISR$C_PROBE_FAULT 5 /* Faulting probe */ #ifdef __INITIAL_POINTER_SIZE #pragma __required_pointer_size __save /* Save current pointer size */ #pragma __required_pointer_size __long /* Pointers are 64-bit */ typedef struct _isr * ISR_PQ; /* Pointer to a ISR structure. */ typedef struct _isr ** ISR_PPQ; /* Pointer to a pointer to a ISR structure. */ #pragma __required_pointer_size __restore /* Return to previous pointer size */ #else typedef unsigned __int64 ISR_PQ; typedef unsigned __int64 ISR_PPQ; #endif /* __INITIAL_POINTER_SIZE */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __ISRDEF_LOADED */