/***************************************************************************/ /** **/ /** HPE CONFIDENTIAL. This software is confidential proprietary software **/ /** licensed by Hewlett-Packard Enterprise Development, LP, and is not **/ /** authorized to be used, duplicated OR disclosed to anyone without the **/ /** prior written permission of HPE. **/ /** © 2023 Copyright Hewlett-Packard Enterprise Development, LP **/ /** **/ /** VMS SOFTWARE, INC. CONFIDENTIAL. This software is confidential **/ /** proprietary software licensed by VMS Software, Inc., and is not **/ /** authorized to be used, duplicated or disclosed to anyone without **/ /** the prior written permission of VMS Software, Inc. **/ /** © 2023 Copyright VMS Software, Inc. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 9-Nov-2023 12:06:45 by OpenVMS SDL V3.7 */ /* Source: 14-AUG-2008 15:02:07 $1$DGA8345:[LIB_H.SRC]IA64_PALDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $IA64_PALDEF ***/ #ifndef __IA64_PALDEF_LOADED #define __IA64_PALDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /*++ */ /* PAL Procedure return structure */ /*-- */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_ret { #pragma __nomember_alignment unsigned __int64 pal_ret$q_val0; unsigned __int64 pal_ret$q_val1; unsigned __int64 pal_ret$q_val2; unsigned __int64 pal_ret$q_val3; } PAL_RET; /*++ */ /* PAL calls */ /*-- */ #define IA64_PAL$K_CACHE_FLUSH 1 #define IA64_PAL$K_CACHE_INFO 2 #define IA64_PAL$K_CACHE_INIT 3 #define IA64_PAL$K_CACHE_SUMMARY 4 #define IA64_PAL$K_MEM_ATTRIB 5 #define IA64_PAL$K_PTCE_INFO 6 #define IA64_PAL$K_VM_INFO 7 #define IA64_PAL$K_VM_SUMMARY 8 #define IA64_PAL$K_BUS_GET_FEATURES 9 #define IA64_PAL$K_BUS_SET_FEATURES 10 #define IA64_PAL$K_DEBUG_INFO 11 #define IA64_PAL$K_FIXED_ADDR 12 #define IA64_PAL$K_FREQ_BASE 13 #define IA64_PAL$K_FREQ_RATIOS 14 #define IA64_PAL$K_PERF_MON_INFO 15 #define IA64_PAL$K_PLATFORM_ADDR 16 #define IA64_PAL$K_PROC_GET_FEATURES 17 #define IA64_PAL$K_PROC_SET_FEATURES 18 #define IA64_PAL$K_RSE_INFO 19 #define IA64_PAL$K_VERSION 20 #define IA64_PAL$K_MC_CLEAR_LOG 21 #define IA64_PAL$K_MC_DRAIN 22 #define IA64_PAL$K_MC_EXPECTED 23 #define IA64_PAL$K_MC_DYNAMIC_STATE 24 #define IA64_PAL$K_MC_ERROR_INFO 25 #define IA64_PAL$K_MC_RESUME 26 #define IA64_PAL$K_MC_REGISTER_MEM 27 #define IA64_PAL$K_HALT 28 #define IA64_PAL$K_HALT_LIGHT 29 #define IA64_PAL$K_COPY_INFO 30 #define IA64_PAL$K_CACHE_LINE_INIT 31 #define IA64_PAL$K_PMI_ENTRYPOINT 32 #define IA64_PAL$K_ENTER_IA_32_ENV 33 #define IA64_PAL$K_VM_PAGE_SIZE 34 #define IA64_PAL$K_MEM_FOR_TEST 37 #define IA64_PAL$K_CACHE_PROT_INFO 38 #define IA64_PAL$K_REGISTER_INFO 39 #define IA64_PAL$K_SHUTDOWN 40 #define IA64_PAL$K_PREFETCH_VISIBILITY 41 #define IA64_PAL$K_LOGICAL_TO_PHYSICAL 42 #define IA64_PAL$K_CACHE_SHARED_INFO 43 #define IA64_PAL$K_PSTATE_INFO 44 #define IA64_PAL$K_MC_ERROR_INJECT 47 /*++ */ /* 256-511 reserved for architecture defined */ /* stack register calls */ /*-- */ #define IA64_PAL$K_COPY_PAL 256 #define IA64_PAL$K_HALT_INFO 257 #define IA64_PAL$K_TEST_PROC 258 #define IA64_PAL$K_CACHE_READ 259 #define IA64_PAL$K_CACHE_WRITE 260 #define IA64_PAL$K_VM_TR_READ 261 #define IA64_PAL$K_GET_PSTATE 262 #define IA64_PAL$K_SET_PSTATE 263 #define IA64_PAL$K_BRAND_INFO 274 #define IA64_PAL$K_CAR_INIT 520 #define IA64_PAL$K_AUTH 521 #define IA64_PAL$K_HALT_LIGHT_SPECIAL 522 #define IA64_PAL$K_CHECK_UNLOGGED_CMCI 523 #define IA64_PAL$K_POWER_INFO 524 #define IA64_PAL$K_SET_MAX_POWER 527 #define IA64_PAL$K_THREAD_CONTROL 528 #define IA64_PAL$K_CACHE_DISABLED_INFO 529 #define IA64_PAL$K_DEFEATURE_L3 530 #define IA64_PAL$K_SET_TIMEOUT 531 #define IA64_PAL$K_CONTEXT_SAVE 544 #define IA64_PAL$K_CONTEXT_RESTORE 545 #define IA64_PAL$K_FORCE_UC_ACCESS 768 /*++ */ /* Generic return status used by PAL calls */ /*-- */ #define IA64_PAL$K_SUCCESS 0 #define IA64_PAL$C_SUCCESS 0 #define IA64_PAL$K_UNIMPL -1 #define IA64_PAL$K_INVAL_ARG -2 #define IA64_PAL$K_FAIL -3 #define IA64_PAL$K_SIDE_EFFECT -4 #define IA64_PAL$K_INFO_NOT_AVAIL -6 /*++ */ /* Definitions used by PAL_BUS_GET_FEATURES/PAL_BUS_SET_FEATURES */ /*-- */ /* definition of return structure */ #define PAL_BUS$M_BCFG_REQ_PARK 0x20000000 #define PAL_BUS$M_BCFG_LOCK 0x40000000 #define PAL_BUS$M_ENA_HALF_XFER 0x80000000 #define PAL_BUS$M_BCFG_DIS_XACT_QUE 0x80000000000000 #define PAL_BUS$M_BCFG_DIS_RSPERR_CHK 0x100000000000000 #define PAL_BUS$M_BCFG_DIS_BERR_CHK 0x200000000000000 #define PAL_BUS$M_BCFG_DIS_IREQ_SIG 0x400000000000000 #define PAL_BUS$M_BCFG_DIS_REQ_SIG 0x800000000000000 #define PAL_BUS$M_BCFG_DIS_INIT 0x1000000000000000 #define PAL_BUS$M_BCFG_DIS_INIT_SIG 0x2000000000000000 #define PAL_BUS$M_BCFG_DIS_AERR 0x4000000000000000 #define PAL_BUS$M_BCFG_DIS_AERR_SIG 0x8000000000000000 #define PAL_BUS$M_BCFG_DIS_DERR 0x0 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_bus { #pragma __nomember_alignment unsigned __int64 pal_bus$q_status; unsigned __int64 pal_bus$q_features_avail; unsigned __int64 pal_bus$q_features_status; __union { unsigned __int64 pal_bus$q_features_control; __struct { unsigned pal_bus$v_filler_1 : 29; /* skip to first field */ unsigned pal_bus$v_bcfg_req_park : 1; /* (1UL << 29) */ unsigned pal_bus$v_bcfg_lock : 1; /* (1UL << 30) */ unsigned pal_bus$v_ena_half_xfer : 1; /* (1UL << 31) */ unsigned pal_bus$v_filler_2 : 23; /* */ unsigned pal_bus$v_bcfg_dis_xact_que : 1; /* (1UL << 54) */ unsigned pal_bus$v_bcfg_dis_rsperr_chk : 1; /* (1UL << 55) */ unsigned pal_bus$v_bcfg_dis_berr_chk : 1; /* (1UL << 56) */ unsigned pal_bus$v_bcfg_dis_ireq_sig : 1; /* (1UL << 57) */ unsigned pal_bus$v_bcfg_dis_req_sig : 1; /* (1UL << 58) */ unsigned pal_bus$v_bcfg_dis_init : 1; /* (1UL << 59) */ unsigned pal_bus$v_bcfg_dis_init_sig : 1; /* (1UL << 60) */ unsigned pal_bus$v_bcfg_dis_aerr : 1; /* (1UL << 61) */ unsigned pal_bus$v_bcfg_dis_aerr_sig : 1; /* (1UL << 62) */ unsigned pal_bus$v_bcfg_dis_derr : 1; /* (1UL << 63) */ unsigned pal_bus$v_fill_0_ : 7; } pal_bus$r_fc_bits; } pal_bus$r_fc_overlay; char pal_bus$b_fill_1_ [7]; } PAL_BUS; #if !defined(__VAXC) #define pal_bus$q_features_control pal_bus$r_fc_overlay.pal_bus$q_features_control #define pal_bus$v_bcfg_req_park pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_req_park #define pal_bus$v_bcfg_lock pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_lock #define pal_bus$v_ena_half_xfer pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_ena_half_xfer #define pal_bus$v_bcfg_dis_xact_que pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_dis_xact_que #define pal_bus$v_bcfg_dis_rsperr_chk pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_dis_rsperr_chk #define pal_bus$v_bcfg_dis_berr_chk pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_dis_berr_chk #define pal_bus$v_bcfg_dis_ireq_sig pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_dis_ireq_sig #define pal_bus$v_bcfg_dis_req_sig pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_dis_req_sig #define pal_bus$v_bcfg_dis_init pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_dis_init #define pal_bus$v_bcfg_dis_init_sig pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_dis_init_sig #define pal_bus$v_bcfg_dis_aerr pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_dis_aerr #define pal_bus$v_bcfg_dis_aerr_sig pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_dis_aerr_sig #define pal_bus$v_bcfg_dis_derr pal_bus$r_fc_overlay.pal_bus$r_fc_bits.pal_bus$v_bcfg_dis_derr #endif /* #if !defined(__VAXC) */ /*++ */ /* Definitions used by PAL_CACHE_FLUSH */ /*-- */ #define IA64_PAL$K_CACHE_ISTREAM 1 #define IA64_PAL$K_CACHE_DSTREAM 2 #define IA64_PAL$K_CACHE_BOTH 3 #define IA64_PAL$K_CACHE_VALIDATE 0 #define IA64_PAL$K_CACHE_INVALIDATE 1 #define IA64_PAL$K_CACHE_POLL_INT 2 #define IA64_PAL$K_CACHE_PLAT_ACK 4 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_cflush { #pragma __nomember_alignment unsigned __int64 pal_cflush$q_status; unsigned __int64 pal_cflush$q_vector; unsigned __int64 pal_cflush$q_progress; unsigned __int64 pal_cflush$q_spare; } PAL_CFLUSH; /*++ */ /* Definitions used by PAL_CACHE_INFO */ /*-- */ #define PAL_CINFO$M_CINFO1_UNIFIED 0x1 #define PAL_CINFO$M_CINFO1_ATTRIB 0x6 #define PAL_CINFO$M_CINFO1_ASSOC 0xFF00 #define PAL_CINFO$M_CINFO1_LSIZE 0xFF0000 #define PAL_CINFO$M_CINFO1_STRIDE 0xFF000000 #define PAL_CINFO$M_CINFO1_STLAT 0xFF00000000 #define PAL_CINFO$M_CINFO1_LDLAT 0xFF0000000000 #define PAL_CINFO$M_CINFO1_STHINT 0xFF000000000000 #define PAL_CINFO$M_CINFO1_LDHINT 0xFF00000000000000 #define PAL_CINFO$M_CINFO2_ALIASB 0xFF00000000 #define PAL_CINFO$M_CINFO2_TAGLS 0xFF0000000000 #define PAL_CINFO$M_CINFO2_TAGMS 0xFF000000000000 #define PAL_CINFO$M_FILLER_2 0xFF00000000000000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_cinfo { #pragma __nomember_alignment unsigned __int64 pal_cinfo$q_status; __union { unsigned __int64 pal_cinfo$q_config_info1; __struct { unsigned pal_cinfo$v_cinfo1_unified : 1; /* (0x1UL << 0) 0 */ unsigned pal_cinfo$v_cinfo1_attrib : 2; /* (0x3UL << 1) 1-2 */ unsigned pal_cinfo$v_filler_1 : 5; /* 3-7 */ unsigned pal_cinfo$v_cinfo1_assoc : 8; /* (0xffUL << 8) 8-15 */ unsigned pal_cinfo$v_cinfo1_lsize : 8; /* (0xffUL << 16) 16-23 */ unsigned pal_cinfo$v_cinfo1_stride : 8; /* (0xffUL << 24) 24-31 */ unsigned pal_cinfo$v_cinfo1_stlat : 8; /* (0xffUL << 32) 32-39 */ unsigned pal_cinfo$v_cinfo1_ldlat : 8; /* (0xffUL << 40) 40-47 */ unsigned pal_cinfo$v_cinfo1_sthint : 8; /* (0xffUL << 48) 48-55 */ unsigned pal_cinfo$v_cinfo1_ldhint : 8; /* (0xffUL << 56) 56-63 */ } pal_cinfo$r_info1_bits; } pal_cinfo$r_info1_overlay; __union { unsigned __int64 pal_cinfo$q_config_info2; __struct { unsigned int pal_cinfo$l_cinfo2_csize; unsigned pal_cinfo$v_cinfo2_aliasb : 8; /* (0xff << 32) 32-39 */ unsigned pal_cinfo$v_cinfo2_tagls : 8; /* (0xff << 40) 40-47 */ unsigned pal_cinfo$v_cinfo2_tagms : 8; /* (0xff << 48) 48-55 */ unsigned pal_cinfo$v_filler_2 : 8; /* 56-63 */ } pal_cinfo$r_info2_bits; } pal_cinfo$r_info2_overlay; unsigned __int64 pal_cinfo$q_spare; } PAL_CINFO; #if !defined(__VAXC) #define pal_cinfo$q_config_info1 pal_cinfo$r_info1_overlay.pal_cinfo$q_config_info1 #define pal_cinfo$v_cinfo1_unified pal_cinfo$r_info1_overlay.pal_cinfo$r_info1_bits.pal_cinfo$v_cinfo1_unified #define pal_cinfo$v_cinfo1_attrib pal_cinfo$r_info1_overlay.pal_cinfo$r_info1_bits.pal_cinfo$v_cinfo1_attrib #define pal_cinfo$v_cinfo1_assoc pal_cinfo$r_info1_overlay.pal_cinfo$r_info1_bits.pal_cinfo$v_cinfo1_assoc #define pal_cinfo$v_cinfo1_lsize pal_cinfo$r_info1_overlay.pal_cinfo$r_info1_bits.pal_cinfo$v_cinfo1_lsize #define pal_cinfo$v_cinfo1_stride pal_cinfo$r_info1_overlay.pal_cinfo$r_info1_bits.pal_cinfo$v_cinfo1_stride #define pal_cinfo$v_cinfo1_stlat pal_cinfo$r_info1_overlay.pal_cinfo$r_info1_bits.pal_cinfo$v_cinfo1_stlat #define pal_cinfo$v_cinfo1_ldlat pal_cinfo$r_info1_overlay.pal_cinfo$r_info1_bits.pal_cinfo$v_cinfo1_ldlat #define pal_cinfo$v_cinfo1_sthint pal_cinfo$r_info1_overlay.pal_cinfo$r_info1_bits.pal_cinfo$v_cinfo1_sthint #define pal_cinfo$v_cinfo1_ldhint pal_cinfo$r_info1_overlay.pal_cinfo$r_info1_bits.pal_cinfo$v_cinfo1_ldhint #define pal_cinfo$q_config_info2 pal_cinfo$r_info2_overlay.pal_cinfo$q_config_info2 #define pal_cinfo$l_cinfo2_csize pal_cinfo$r_info2_overlay.pal_cinfo$r_info2_bits.pal_cinfo$l_cinfo2_csize #define pal_cinfo$v_cinfo2_aliasb pal_cinfo$r_info2_overlay.pal_cinfo$r_info2_bits.pal_cinfo$v_cinfo2_aliasb #define pal_cinfo$v_cinfo2_tagls pal_cinfo$r_info2_overlay.pal_cinfo$r_info2_bits.pal_cinfo$v_cinfo2_tagls #define pal_cinfo$v_cinfo2_tagms pal_cinfo$r_info2_overlay.pal_cinfo$r_info2_bits.pal_cinfo$v_cinfo2_tagms #define pal_cinfo$v_filler_2 pal_cinfo$r_info2_overlay.pal_cinfo$r_info2_bits.pal_cinfo$v_filler_2 #endif /* #if !defined(__VAXC) */ /*++ */ /* Config 1 information returned */ /*-- */ #define IA64_PAL$K_CACHE_WRITETHRU 0 #define IA64_PAL$K_CACHE_WRITEBACK 1 #define IA64_PAL$K_CACHE_EITHER 2 #define IA64_PAL$K_CACHE_TYPE_INST 1 #define IA64_PAL$K_CACHE_TYPE_DATA 2 /*++ */ /* Config 2 information returned */ /*-- */ /*++ */ /* Definitions used by PAL_CACHE_INIT */ /*-- */ #define IA64_PAL$K_CACHE_INIT_ALL -1 #define IA64_PAL$K_CACHE_NO_RESTRICT 0 #define IA64_PAL$K_CACHE_RESTRICT 1 /*++ */ /* Definitions used by PAL_CACHE_PROT_INFO */ /*-- */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_cpinfo { #pragma __nomember_alignment unsigned __int64 pal_cpinfo$q_status; unsigned int pal_cpinfo$l_config_info1 [2]; unsigned int pal_cpinfo$l_config_info2 [2]; unsigned int pal_cpinfo$l_config_info3 [2]; } PAL_CPINFO; /* bitmask for config */ #define IA64_PAL$M_CPINFO_DATA_BITS 255 #define IA64_PAL$M_CPINFO_TPROT_LSB 768 #define IA64_PAL$M_CPINFO_TPROT_MSB 1032192 #define IA64_PAL$M_CPINFO_TPROT_BITS 66060288 #define IA64_PAL$M_CPINFO_METHOD 1006632960 #define IA64_PAL$M_CPINFO_TAG_DATA -1073741824 /* bitmask for config */ #define IA64_PAL$V_CPINFO_DATA_BITS 0 #define IA64_PAL$V_CPINFO_TPROT_LSB 8 #define IA64_PAL$V_CPINFO_TPROT_MSB 14 #define IA64_PAL$V_CPINFO_TPROT_BITS 20 #define IA64_PAL$V_CPINFO_METHOD 26 #define IA64_PAL$V_CPINFO_TAG_DATA 30 /* values */ #define IA64_PAL$K_CACHE_PROT_DATA 0 #define IA64_PAL$K_CACHE_PROT_TAG 1 #define IA64_PAL$K_CACHE_PROT_TAG_DATA 2 #define IA64_PAL$K_CACHE_PROT_DATA_TAG 3 #define IA64_PAL$K_CACHE_PROT_NONE 0 #define IA64_PAL$K_CACHE_PROT_ODDPAR 1 #define IA64_PAL$K_CACHE_PROT_EVENPAR 2 #define IA64_PAL$K_CACHE_PROT_ECC 3 /*++ */ /* Definitions used by PAL_CACHE_SUMMARY */ /*-- */ /* return structure */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_csumm { #pragma __nomember_alignment unsigned __int64 pal_csumm$q_status; unsigned __int64 pal_csumm$q_cache_levels; unsigned __int64 pal_csumm$q_unique_caches; unsigned __int64 pal_csumm$q_spare; } PAL_CSUMM; /*++ */ /* Definitions used by PAL_COPY_INFO */ /*-- */ /* return structure */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_copy_info { #pragma __nomember_alignment unsigned __int64 pal_copy_info$q_status; unsigned __int64 pal_copy_info$q_buffer_size; unsigned __int64 pal_copy_info$q_buffer_align; unsigned __int64 pal_copy_info$q_spare; } PAL_COPY_INFO; /*++ */ /* Definitions used by PAL_COPY_PAL */ /*-- */ /* return structure */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_copy_pal { #pragma __nomember_alignment unsigned __int64 pal_copy_pal$q_status; unsigned __int64 pal_copy_pal$q_proc_offset; unsigned __int64 pal_copy_pal$q_spare1; unsigned __int64 pal_copy_pal$q_spare2; } PAL_COPY_PAL; /*++ */ /* Definitions used by PAL_DEBUG_INFO */ /*-- */ /* return structure */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_debug_info { #pragma __nomember_alignment unsigned __int64 pal_debug_info$q_status; unsigned __int64 pal_debug_info$q_iregs; unsigned __int64 pal_debug_info$q_dregs; unsigned __int64 pal_debug_info$q_spare; } PAL_DEBUG_INFO; /*++ */ /* Definitions used by PAL_PSTATE_INFO */ /*-- */ /* return structure. PAL_PSTATE_INFO wants an array of 8 of these (i.e. 256 bytes), with the number */ /* of valid entries = the number of pstates = the second integer return value */ #define PAL_PSTATE_INFO$M_PERF_INDEX 0x7F #define PAL_PSTATE_INFO$M_TYPICAL_POWER 0xFFFFFFFFFFFFF000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_pstate_info { #pragma __nomember_alignment __union { unsigned __int64 pal_pstate_info$q_quad1; __struct { unsigned pal_pstate_info$v_perf_index : 7; unsigned pal_pstate_info$v_filler_1 : 5; #if defined(__VAXC) unsigned pal_pstate_info$v_typical_power_1 : 32; unsigned pal_pstate_info$v_typical_power_2 : 20; #else unsigned __int64 pal_pstate_info$v_typical_power : 52; #endif } pal_pstate_info$r_dd_bits; } pal_pstate_info$r_pstate_info1_ove; unsigned __int64 pal_pstate_info$q_trans_latency_1; unsigned __int64 pal_pstate_info$q_trans_latency_2; unsigned __int64 pal_pstate_info$q_spare; } PAL_PSTATE_INFO; #if !defined(__VAXC) #define pal_pstate_info$q_quad1 pal_pstate_info$r_pstate_info1_ove.pal_pstate_info$q_quad1 #define pal_pstate_info$v_perf_index pal_pstate_info$r_pstate_info1_ove.pal_pstate_info$r_dd_bits.pal_pstate_info$v_perf_index #define pal_pstate_info$v_typical_power pal_pstate_info$r_pstate_info1_ove.pal_pstate_info$r_dd_bits.pal_pstate_info$v_typical_power #endif /* #if !defined(__VAXC) */ /* Pstate return values */ #define PAL_PSTATE_RETURNS$M_DDT 0x7 #define PAL_PSTATE_RETURNS$M_DDIT 0x7E0 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_pstate_info_returns { #pragma __nomember_alignment unsigned __int64 pal_pstate_returns$q_status; unsigned __int64 pal_pstate_returns$q_pstate_num; __union { unsigned __int64 pal_pstate_returns$q_dd_info; __struct { unsigned pal_pstate_returns$v_ddt : 3; unsigned pal_pstate_returns$v_rsv1 : 2; unsigned pal_pstate_returns$v_ddit : 6; unsigned pal_pstate_returns$v_fill_2_ : 5; } pal_pstate_returns$r_dd_bits; } pal_pstate_returns$r_dd_overlay; unsigned __int64 pal_pstate_returns$q_spare; } PAL_PSTATE_INFO_RETURNS; #if !defined(__VAXC) #define pal_pstate_returns$q_dd_info pal_pstate_returns$r_dd_overlay.pal_pstate_returns$q_dd_info #define pal_pstate_returns$v_ddt pal_pstate_returns$r_dd_overlay.pal_pstate_returns$r_dd_bits.pal_pstate_returns$v_ddt #define pal_pstate_returns$v_ddit pal_pstate_returns$r_dd_overlay.pal_pstate_returns$r_dd_bits.pal_pstate_returns$v_ddit #endif /* #if !defined(__VAXC) */ /*++ */ /* Definitions used by PAL_RSE_INFO */ /*-- */ /* return structure */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_rse_info { #pragma __nomember_alignment unsigned __int64 pal_rse_info$q_status; unsigned __int64 pal_rse_info$q_phys_stacked; unsigned __int64 pal_rse_info$q_hints; unsigned __int64 pal_rse_info$q_spare; } PAL_RSE_INFO; /*++ */ /* Definitions used by PAL_FREQ_BASE */ /*-- */ /* return structure */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_freq_base { #pragma __nomember_alignment unsigned __int64 pal_freq_base$q_status; unsigned __int64 pal_freq_base$q_base_freq; unsigned __int64 pal_freq_base$q_spare1; unsigned __int64 pal_freq_base$q_spare2; } PAL_FREQ_BASE; #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_freq_ratio { #pragma __nomember_alignment __union { unsigned __int64 pal_freq_ratio$q_v0; __struct { unsigned int pal_freq_ratio$l_denominator; unsigned int pal_freq_ratio$l_numerator; } pal_freq_ratio$r_pal_freq_v1; } pal_freq_ratio$r_pal_freq_overlay; } PAL_FREQ_RATIO; #if !defined(__VAXC) #define pal_freq_ratio$q_v0 pal_freq_ratio$r_pal_freq_overlay.pal_freq_ratio$q_v0 #define pal_freq_ratio$l_denominator pal_freq_ratio$r_pal_freq_overlay.pal_freq_ratio$r_pal_freq_v1.pal_freq_ratio$l_denominator #define pal_freq_ratio$l_numerator pal_freq_ratio$r_pal_freq_overlay.pal_freq_ratio$r_pal_freq_v1.pal_freq_ratio$l_numerator #endif /* #if !defined(__VAXC) */ /*++ */ /* Definitions used by PAL_HALT */ /*-- */ #define IA64_PAL$K_PAL_HALT_1 1 #define IA64_PAL$K_PAL_HALT_2 2 #define IA64_PAL$K_PAL_HALT_3 3 #define IA64_PAL$K_PAL_HALT_4 4 #define IA64_PAL$K_PAL_HALT_5 5 #define IA64_PAL$K_PAL_HALT_6 6 #define IA64_PAL$K_PAL_HALT_7 7 /*++ */ /* Definitions used by PAL_HALT_INFO */ /*-- */ #define PAL_HALT_INFO$M_PWR_IM 0x1000000000000000 #define PAL_HALT_INFO$M_PWR_CO 0x2000000000000000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_halt_info { #pragma __nomember_alignment __union { unsigned __int64 pal_halt_info$q_info; __struct { unsigned short int pal_halt_info$w_pwr_exit_lat; /* (0xffffUL << 0) */ unsigned short int pal_halt_info$w_pwr_entry_lat; /* (0xffffUL << 16) */ unsigned pal_halt_info$v_pwr_consump : 28; unsigned pal_halt_info$v_pwr_im : 1; unsigned pal_halt_info$v_pwr_co : 1; unsigned pal_halt_info$v_fill_3_ : 2; } pal_halt_info$r_pal_halt_fields; } pal_halt_info$r_pal_halt_overlay; } PAL_HALT_INFO; #if !defined(__VAXC) #define pal_halt_info$q_info pal_halt_info$r_pal_halt_overlay.pal_halt_info$q_info #define pal_halt_info$w_pwr_exit_lat pal_halt_info$r_pal_halt_overlay.pal_halt_info$r_pal_halt_fields.pal_halt_info$w_pwr_exit_lat #define pal_halt_info$w_pwr_entry_lat pal_halt_info$r_pal_halt_overlay.pal_halt_info$r_pal_halt_fields.pal_halt_info$w_pwr_entry_lat #define pal_halt_info$v_pwr_consump pal_halt_info$r_pal_halt_overlay.pal_halt_info$r_pal_halt_fields.pal_halt_info$v_pwr_consump #define pal_halt_info$v_pwr_im pal_halt_info$r_pal_halt_overlay.pal_halt_info$r_pal_halt_fields.pal_halt_info$v_pwr_im #define pal_halt_info$v_pwr_co pal_halt_info$r_pal_halt_overlay.pal_halt_info$r_pal_halt_fields.pal_halt_info$v_pwr_co #endif /* #if !defined(__VAXC) */ /*++ */ /* Definitions used by PAL_MC_CLEAR_LOG */ /*-- */ /* return structure */ #define PAL_MC_CLOG$M_PEND_MCHK 0x1 #define PAL_MC_CLOG$M_PEND_INIT 0x2 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_mc_clog { #pragma __nomember_alignment unsigned __int64 pal_mc_clog$q_status; __union { unsigned __int64 pal_mc_clog$q_pending; __struct { unsigned pal_mc_clog$v_pend_mchk : 1; unsigned pal_mc_clog$v_pend_init : 1; unsigned pal_mc_clog$v_fill_4_ : 6; } pal_mc_clog$r_mc_clog_bits; } pal_mc_clog$r_mc_clog_overlay; unsigned __int64 pal_mc_clog$q_spare1; unsigned __int64 pal_mc_clog$q_spare2; } PAL_MC_CLOG; #if !defined(__VAXC) #define pal_mc_clog$q_pending pal_mc_clog$r_mc_clog_overlay.pal_mc_clog$q_pending #define pal_mc_clog$v_pend_mchk pal_mc_clog$r_mc_clog_overlay.pal_mc_clog$r_mc_clog_bits.pal_mc_clog$v_pend_mchk #define pal_mc_clog$v_pend_init pal_mc_clog$r_mc_clog_overlay.pal_mc_clog$r_mc_clog_bits.pal_mc_clog$v_pend_init #endif /* #if !defined(__VAXC) */ /*++ */ /* Definitions used by PAL_MC_ERROR_INFO */ /*-- */ /* return structure */ #define PAL_MCERR$M_FILLER_1 0xFFFF #define PAL_MCERR$M_CACHE_CHK_WAY 0x1F0000 #define PAL_MCERR$M_FILLER_2 0x200000 #define PAL_MCERR$M_CACHE_CHK_MC 0x400000 #define PAL_MCERR$M_CACHE_CHK_TV 0x800000 #define PAL_MCERR$M_CACHE_CHK_WV 0x1000000 #define PAL_MCERR$M_CACHE_CHK_OPER 0xE000000 #define PAL_MCERR$M_CACHE_CHK_DATA 0x10000000 #define PAL_MCERR$M_CACHE_CHK_TAG 0x20000000 #define PAL_MCERR$M_CACHE_CHK_DCACHE 0x40000000 #define PAL_MCERR$M_CACHE_CHK_ICACHE 0x80000000 #define PAL_MCERR$M_CACHE_CHK_INDEX 0xFFFFFF00000000 #define PAL_MCERR$M_CACHE_CHK_MV 0x100000000000000 #define PAL_MCERR$M_CACHE_CHK_MESI 0xE00000000000000 #define PAL_MCERR$M_CACHE_CHK_LEVEL 0xF000000000000000 #define PAL_MCERR$M_TLB_CHK_TRSLOT 0xFF #define PAL_MCERR$M_FILLER_3 0xFF00 #define PAL_MCERR$M_TLB_CHK_ITC 0x10000 #define PAL_MCERR$M_TLB_CHK_DTC 0x20000 #define PAL_MCERR$M_TLB_CHK_ITR 0x40000 #define PAL_MCERR$M_TLB_CHK_DTR 0x80000 #define PAL_MCERR$M_TLB_CHK_MC 0x100000 #define PAL_MCERR$M_BUS_CHK_SIZE 0x1F #define PAL_MCERR$M_BUS_CHK_IB 0x20 #define PAL_MCERR$M_BUS_CHK_EB 0x40 #define PAL_MCERR$M_BUS_CHK_CC 0x80 #define PAL_MCERR$M_BUS_CHK_TYPE 0xFF00 #define PAL_MCERR$M_BUS_CHK_SEVERITY 0x1F0000 #define PAL_MCERR$M_BUS_CHK_TADDR_V 0x200000 #define PAL_MCERR$M_BUS_CHK_RSPADDR_V 0x400000 #define PAL_MCERR$M_BUS_CHK_REQADDR_V 0x800000 #define PAL_MCERR$M_BUS_CHK_BUSINFO 0xFF000000 #define PAL_MCERR$M_BUS_CHK_MC 0x100000000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_mcerr { #pragma __nomember_alignment unsigned __int64 pal_mcerr$q_status; __union { unsigned __int64 pal_mcerr$q_error_info; unsigned __int64 pal_mcerr$q_size; __struct { unsigned pal_mcerr$v_filler_1 : 16; /* 0-15 */ unsigned pal_mcerr$v_cache_chk_way : 5; /* (0x1fUL << 16) 16-20 */ unsigned pal_mcerr$v_filler_2 : 1; /* 21 */ unsigned pal_mcerr$v_cache_chk_mc : 1; /* (0x1UL << 22) 22 */ unsigned pal_mcerr$v_cache_chk_tv : 1; /* (0x1UL << 23) 23 */ unsigned pal_mcerr$v_cache_chk_wv : 1; /* (0x1UL << 24) 24 */ unsigned pal_mcerr$v_cache_chk_oper : 3; /* (0x7UL << 25) 25-27 */ unsigned pal_mcerr$v_cache_chk_data : 1; /* (0x1UL << 28) 28 */ unsigned pal_mcerr$v_cache_chk_tag : 1; /* (0x1UL << 29) 29 */ unsigned pal_mcerr$v_cache_chk_dcache : 1; /* (0x1UL << 30) 30 */ unsigned pal_mcerr$v_cache_chk_icache : 1; /* (0x1UL << 31) 31 */ unsigned pal_mcerr$v_cache_chk_index : 24; /* (0xffffffUL << 32) 32-55 */ unsigned pal_mcerr$v_cache_chk_mv : 1; /* (0x1fUL << 56) 56 */ unsigned pal_mcerr$v_cache_chk_mesi : 3; /* (0x7UL << 57) 57-59 */ unsigned pal_mcerr$v_cache_chk_level : 4; /* (0xfUL << 60) 60-63 */ } pal_mcerr$r_cache_bits; __struct { unsigned pal_mcerr$v_tlb_chk_trslot : 8; /* (0xffUL << 0) 0-7 */ unsigned pal_mcerr$v_filler_3 : 8; /* 8-15 */ unsigned pal_mcerr$v_tlb_chk_itc : 1; /* (0x1UL << 16) 16 */ unsigned pal_mcerr$v_tlb_chk_dtc : 1; /* (0x1UL << 17) 17 */ unsigned pal_mcerr$v_tlb_chk_itr : 1; /* (0x1UL << 18) 18 */ unsigned pal_mcerr$v_tlb_chk_dtr : 1; /* (0x1UL << 19) 19 */ unsigned pal_mcerr$v_tlb_chk_mc : 1; /* (0x1UL << 20) 20 */ unsigned pal_mcerr$v_fill_5_ : 3; } pal_mcerr$r_tlb_bits; __struct { unsigned pal_mcerr$v_bus_chk_size : 5; /* (0x1fUL << 0) 0-4 */ unsigned pal_mcerr$v_bus_chk_ib : 1; /* (0x1UL << 5) 5 */ unsigned pal_mcerr$v_bus_chk_eb : 1; /* (0x1UL << 6) 6 */ unsigned pal_mcerr$v_bus_chk_cc : 1; /* (0x1UL << 7) 7 */ unsigned pal_mcerr$v_bus_chk_type : 8; /* (0xffUL << 8) 8-15 */ unsigned pal_mcerr$v_bus_chk_severity : 5; /* (0x1fUL << 16) 16-20 */ unsigned pal_mcerr$v_bus_chk_taddr_v : 1; /* (0x1UL << 21) 21 */ unsigned pal_mcerr$v_bus_chk_rspaddr_v : 1; /* (0x1UL << 22) 22 */ unsigned pal_mcerr$v_bus_chk_reqaddr_v : 1; /* (0x1UL << 23) 23 */ unsigned pal_mcerr$v_bus_chk_businfo : 8; /* (0xffUL << 24) 24-31 */ unsigned pal_mcerr$v_bus_chk_mc : 1; /* (0x1UL << 32) 32 */ unsigned pal_mcerr$v_fill_6_ : 7; } pal_mcerr$r_bus_bits; } pal_mcerr$r_mcerr_overlay; unsigned __int64 pal_mcerr$q_inc_err_type; unsigned __int64 pal_mcerr$q_spare; } PAL_MCERR; #if !defined(__VAXC) #define pal_mcerr$q_error_info pal_mcerr$r_mcerr_overlay.pal_mcerr$q_error_info #define pal_mcerr$q_size pal_mcerr$r_mcerr_overlay.pal_mcerr$q_size #define pal_mcerr$v_cache_chk_way pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_way #define pal_mcerr$v_cache_chk_mc pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_mc #define pal_mcerr$v_cache_chk_tv pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_tv #define pal_mcerr$v_cache_chk_wv pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_wv #define pal_mcerr$v_cache_chk_oper pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_oper #define pal_mcerr$v_cache_chk_data pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_data #define pal_mcerr$v_cache_chk_tag pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_tag #define pal_mcerr$v_cache_chk_dcache pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_dcache #define pal_mcerr$v_cache_chk_icache pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_icache #define pal_mcerr$v_cache_chk_index pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_index #define pal_mcerr$v_cache_chk_mv pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_mv #define pal_mcerr$v_cache_chk_mesi pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_mesi #define pal_mcerr$v_cache_chk_level pal_mcerr$r_mcerr_overlay.pal_mcerr$r_cache_bits.pal_mcerr$v_cache_chk_level #define pal_mcerr$v_tlb_chk_trslot pal_mcerr$r_mcerr_overlay.pal_mcerr$r_tlb_bits.pal_mcerr$v_tlb_chk_trslot #define pal_mcerr$v_filler_3 pal_mcerr$r_mcerr_overlay.pal_mcerr$r_tlb_bits.pal_mcerr$v_filler_3 #define pal_mcerr$v_tlb_chk_itc pal_mcerr$r_mcerr_overlay.pal_mcerr$r_tlb_bits.pal_mcerr$v_tlb_chk_itc #define pal_mcerr$v_tlb_chk_dtc pal_mcerr$r_mcerr_overlay.pal_mcerr$r_tlb_bits.pal_mcerr$v_tlb_chk_dtc #define pal_mcerr$v_tlb_chk_itr pal_mcerr$r_mcerr_overlay.pal_mcerr$r_tlb_bits.pal_mcerr$v_tlb_chk_itr #define pal_mcerr$v_tlb_chk_dtr pal_mcerr$r_mcerr_overlay.pal_mcerr$r_tlb_bits.pal_mcerr$v_tlb_chk_dtr #define pal_mcerr$v_tlb_chk_mc pal_mcerr$r_mcerr_overlay.pal_mcerr$r_tlb_bits.pal_mcerr$v_tlb_chk_mc #define pal_mcerr$v_bus_chk_size pal_mcerr$r_mcerr_overlay.pal_mcerr$r_bus_bits.pal_mcerr$v_bus_chk_size #define pal_mcerr$v_bus_chk_ib pal_mcerr$r_mcerr_overlay.pal_mcerr$r_bus_bits.pal_mcerr$v_bus_chk_ib #define pal_mcerr$v_bus_chk_eb pal_mcerr$r_mcerr_overlay.pal_mcerr$r_bus_bits.pal_mcerr$v_bus_chk_eb #define pal_mcerr$v_bus_chk_cc pal_mcerr$r_mcerr_overlay.pal_mcerr$r_bus_bits.pal_mcerr$v_bus_chk_cc #define pal_mcerr$v_bus_chk_type pal_mcerr$r_mcerr_overlay.pal_mcerr$r_bus_bits.pal_mcerr$v_bus_chk_type #define pal_mcerr$v_bus_chk_severity pal_mcerr$r_mcerr_overlay.pal_mcerr$r_bus_bits.pal_mcerr$v_bus_chk_severity #define pal_mcerr$v_bus_chk_taddr_v pal_mcerr$r_mcerr_overlay.pal_mcerr$r_bus_bits.pal_mcerr$v_bus_chk_taddr_v #define pal_mcerr$v_bus_chk_rspaddr_v pal_mcerr$r_mcerr_overlay.pal_mcerr$r_bus_bits.pal_mcerr$v_bus_chk_rspaddr_v #define pal_mcerr$v_bus_chk_reqaddr_v pal_mcerr$r_mcerr_overlay.pal_mcerr$r_bus_bits.pal_mcerr$v_bus_chk_reqaddr_v #define pal_mcerr$v_bus_chk_businfo pal_mcerr$r_mcerr_overlay.pal_mcerr$r_bus_bits.pal_mcerr$v_bus_chk_businfo #define pal_mcerr$v_bus_chk_mc pal_mcerr$r_mcerr_overlay.pal_mcerr$r_bus_bits.pal_mcerr$v_bus_chk_mc #endif /* #if !defined(__VAXC) */ /* values needed */ #define IA64_PAL$K_MCERR_TYPE_PROC 0 #define IA64_PAL$K_MCERR_TYPE_CACHE 1 #define IA64_PAL$K_MCERR_TYPE_TLB 2 #define IA64_PAL$K_MCERR_TYPE_BUS 3 #define IA64_PAL$K_MCERR_TYPE_REQADR 4 #define IA64_PAL$K_MCERR_TYPE_RSPADR 5 #define IA64_PAL$K_MCERR_TYPE_TGTADR 6 #define IA64_PAL$K_MCERR_TYPE_IMPL 7 /*++ */ /* Definitions used by PAL_PERF_MON_INFO */ /*-- */ /* return structure */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_pm_info { #pragma __nomember_alignment unsigned __int64 pal_pm_info$q_status; __union { unsigned __int64 pal_pm_info$q_info; __struct { unsigned char pal_pm_info$b_generic; /* (0xffUL << 0) */ unsigned char pal_pm_info$b_width; /* (0xffUL << 8) */ unsigned char pal_pm_info$b_cycles; /* (0xffUL << 16) */ unsigned char pal_pm_info$b_retired; /* (0xffUL << 24) */ } pal_pm_info$r_pm_info_fields; } pal_pm_info$r_pm_info_overlay; unsigned __int64 pal_pm_info$q_spare1; unsigned __int64 pal_pm_info$q_spare2; } PAL_PM_INFO; #if !defined(__VAXC) #define pal_pm_info$q_info pal_pm_info$r_pm_info_overlay.pal_pm_info$q_info #define pal_pm_info$b_generic pal_pm_info$r_pm_info_overlay.pal_pm_info$r_pm_info_fields.pal_pm_info$b_generic #define pal_pm_info$b_width pal_pm_info$r_pm_info_overlay.pal_pm_info$r_pm_info_fields.pal_pm_info$b_width #define pal_pm_info$b_cycles pal_pm_info$r_pm_info_overlay.pal_pm_info$r_pm_info_fields.pal_pm_info$b_cycles #define pal_pm_info$b_retired pal_pm_info$r_pm_info_overlay.pal_pm_info$r_pm_info_fields.pal_pm_info$b_retired #endif /* #if !defined(__VAXC) */ /* PM buffer structure */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_pm_buffer { #pragma __nomember_alignment unsigned __int64 pal_pm_buffer$q_pmc_implemented [4]; unsigned __int64 pal_pm_buffer$q_pmd_implemented [4]; unsigned __int64 pal_pm_buffer$q_count_cycles [4]; unsigned __int64 pal_pm_buffer$q_count_retired [4]; } PAL_PM_BUFFER; /*++ */ /* Definitions needed by PAL_PTCE_INFO */ /*-- */ /* return structure */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_ptce_info { #pragma __nomember_alignment unsigned __int64 pal_ptce_info$q_status; #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __long /* And set ptr size default to 64-bit pointers */ void *pal_ptce_info$pq_tc_base; #else unsigned __int64 pal_ptce_info$pq_tc_base; #endif unsigned int pal_ptce_info$l_tc_counts [2]; unsigned int pal_ptce_info$l_tc_strides [2]; } PAL_PTCE_INFO; /*++ */ /* Definitions needed by PAL_VM_INFO */ /*-- */ /* return structure */ #define PAL_VM_INFO$M_PF 0x100000000 #define PAL_VM_INFO$M_UNIFIED 0x200000000 #define PAL_VM_INFO$M_TR_REDUCE 0x400000000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_vm_info { #pragma __nomember_alignment unsigned __int64 pal_vm_info$q_status; __union { unsigned __int64 pal_vm_info$q_tc_info; __struct { unsigned char pal_vm_info$b_num_sets; /* (0xffUL << 0) */ unsigned char pal_vm_info$b_num_ways; /* (0xffUL << 8) */ unsigned short int pal_vm_info$w_num_entries; /* (0xffffUL << 16) */ unsigned pal_vm_info$v_pf : 1; /* (0x1UL << 32) */ unsigned pal_vm_info$v_unified : 1; /* (0x1UL << 33) */ unsigned pal_vm_info$v_tr_reduce : 1; /* (0x1UL << 34) */ unsigned pal_vm_info$v_fill_7_ : 5; } pal_vm_info$r_tc_info_fields; } pal_vm_info$r_tc_info_overlay; unsigned __int64 pal_vm_info$q_tc_pages; unsigned __int64 pal_vm_info$q_spare; } PAL_VM_INFO; #if !defined(__VAXC) #define pal_vm_info$q_tc_info pal_vm_info$r_tc_info_overlay.pal_vm_info$q_tc_info #define pal_vm_info$b_num_sets pal_vm_info$r_tc_info_overlay.pal_vm_info$r_tc_info_fields.pal_vm_info$b_num_sets #define pal_vm_info$b_num_ways pal_vm_info$r_tc_info_overlay.pal_vm_info$r_tc_info_fields.pal_vm_info$b_num_ways #define pal_vm_info$w_num_entries pal_vm_info$r_tc_info_overlay.pal_vm_info$r_tc_info_fields.pal_vm_info$w_num_entries #define pal_vm_info$v_pf pal_vm_info$r_tc_info_overlay.pal_vm_info$r_tc_info_fields.pal_vm_info$v_pf #define pal_vm_info$v_unified pal_vm_info$r_tc_info_overlay.pal_vm_info$r_tc_info_fields.pal_vm_info$v_unified #define pal_vm_info$v_tr_reduce pal_vm_info$r_tc_info_overlay.pal_vm_info$r_tc_info_fields.pal_vm_info$v_tr_reduce #endif /* #if !defined(__VAXC) */ /*++ */ /* Definitions needed by PAL_VM_PAGE_SIZE */ /*-- */ /* return structure */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_vm_pgsize { #pragma __nomember_alignment unsigned __int64 pal_vm_pgsize$q_status; unsigned __int64 pal_vm_pgsize$q_insert_pages; unsigned __int64 pal_vm_pgsize$q_purge_pages; unsigned __int64 pal_vm_pgsize$q_spare; } PAL_VM_PGSIZE; /* bits masks */ #define IA64_PAL$M_VM_PGSIZE_4KB 4096 /* (0x1UL << 12) */ #define IA64_PAL$M_VM_PGSIZE_8KB 8192 /* (0x1UL << 13) */ #define IA64_PAL$M_VM_PGSIZE_16KB 16384 /* (0x1UL << 14) */ #define IA64_PAL$M_VM_PGSIZE_32KB 32768 /* (0x1UL << 15) */ #define IA64_PAL$M_VM_PGSIZE_64KB 65536 /* (0x1UL << 16) */ #define IA64_PAL$M_VM_PGSIZE_128KB 131072 /* (0x1UL << 17) */ #define IA64_PAL$M_VM_PGSIZE_256KB 262144 /* (0x1UL << 18) */ #define IA64_PAL$M_VM_PGSIZE_512KB 524288 /* (0x1UL << 19) */ #define IA64_PAL$M_VM_PGSIZE_1MB 1048576 /* (0x1UL << 20) */ #define IA64_PAL$M_VM_PGSIZE_2MB 2097152 /* (0x1UL << 21) */ #define IA64_PAL$M_VM_PGSIZE_4MB 4194304 /* (0x1UL << 22) */ #define IA64_PAL$M_VM_PGSIZE_8MB 8388608 /* (0x1UL << 23) */ #define IA64_PAL$M_VM_PGSIZE_16MB 16777216 /* (0x1UL << 24) */ #define IA64_PAL$M_VM_PGSIZE_32MB 33554432 /* (0x1UL << 25) */ #define IA64_PAL$M_VM_PGSIZE_64MB 67108864 /* (0x1UL << 26) */ #define IA64_PAL$M_VM_PGSIZE_128MB 134217728 /* (0x1UL << 27) */ #define IA64_PAL$M_VM_PGSIZE_256MB 268435456 /* (0x1UL << 28) */ #define IA64_PAL$M_VM_PGSIZE_512MB 536870912 /* (0x1UL << 29) */ #define IA64_PAL$M_VM_PGSIZE_1GB 1073741824 /* (0x1UL << 30) */ #define IA64_PAL$M_VM_PGSIZE_2GB -2147483648 /* (0x1UL << 31) */ /*++ */ /* Definitions needed for PAL_VM_SUMMARY */ /*-- */ /* return structure */ #define PAL_VM_SUMMARY$M_VW 0x1 #define PAL_VM_SUMMARY$M_PADDR_SIZE 0xFE #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_vm_summary { #pragma __nomember_alignment unsigned __int64 pal_vm_summary$q_status; __union { unsigned __int64 pal_vm_summary$q_info1; __struct { unsigned pal_vm_summary$v_vw : 1; /* (0x1UL << 0) */ unsigned pal_vm_summary$v_paddr_size : 7; /* (0x7fUL << 1) */ unsigned char pal_vm_summary$b_key_size; /* (0xffUL << 8) */ unsigned char pal_vm_summary$b_max_pkr; /* (0xffUL << 16) */ unsigned char pal_vm_summary$b_hash_id; /* (0xffUL << 24) */ unsigned char pal_vm_summary$b_max_dtr; /* (0xffUL << 32) */ unsigned char pal_vm_summary$b_max_itr; /* (0xffUL << 40) */ unsigned char pal_vm_summary$b_uniq_tc; /* (0xffUL << 48) */ unsigned char pal_vm_summary$b_tc_levels; /* (0xffUL << 56) */ } pal_vm_summary$r_info1_fields; } pal_vm_summary$r_vm_info1_overlay; __union { unsigned __int64 pal_vm_summary$q_info2; __struct { unsigned char pal_vm_summary$b_va_msb; /* (0xffUL << 0) */ unsigned char pal_vm_summary$b_rid_size; /* (0xffUL << 8) */ } pal_vm_summary$r_info2_fields; } pal_vm_summary$r_vm_info2_overlay; unsigned __int64 pal_vm_summary$q_spare; } PAL_VM_SUMMARY; #if !defined(__VAXC) #define pal_vm_summary$q_info1 pal_vm_summary$r_vm_info1_overlay.pal_vm_summary$q_info1 #define pal_vm_summary$v_vw pal_vm_summary$r_vm_info1_overlay.pal_vm_summary$r_info1_fields.pal_vm_summary$v_vw #define pal_vm_summary$v_paddr_size pal_vm_summary$r_vm_info1_overlay.pal_vm_summary$r_info1_fields.pal_vm_summary$v_paddr_size #define pal_vm_summary$b_key_size pal_vm_summary$r_vm_info1_overlay.pal_vm_summary$r_info1_fields.pal_vm_summary$b_key_size #define pal_vm_summary$b_max_pkr pal_vm_summary$r_vm_info1_overlay.pal_vm_summary$r_info1_fields.pal_vm_summary$b_max_pkr #define pal_vm_summary$b_hash_id pal_vm_summary$r_vm_info1_overlay.pal_vm_summary$r_info1_fields.pal_vm_summary$b_hash_id #define pal_vm_summary$b_max_dtr pal_vm_summary$r_vm_info1_overlay.pal_vm_summary$r_info1_fields.pal_vm_summary$b_max_dtr #define pal_vm_summary$b_max_itr pal_vm_summary$r_vm_info1_overlay.pal_vm_summary$r_info1_fields.pal_vm_summary$b_max_itr #define pal_vm_summary$b_uniq_tc pal_vm_summary$r_vm_info1_overlay.pal_vm_summary$r_info1_fields.pal_vm_summary$b_uniq_tc #define pal_vm_summary$b_tc_levels pal_vm_summary$r_vm_info1_overlay.pal_vm_summary$r_info1_fields.pal_vm_summary$b_tc_levels #define pal_vm_summary$q_info2 pal_vm_summary$r_vm_info2_overlay.pal_vm_summary$q_info2 #define pal_vm_summary$b_va_msb pal_vm_summary$r_vm_info2_overlay.pal_vm_summary$r_info2_fields.pal_vm_summary$b_va_msb #define pal_vm_summary$b_rid_size pal_vm_summary$r_vm_info2_overlay.pal_vm_summary$r_info2_fields.pal_vm_summary$b_rid_size #endif /* #if !defined(__VAXC) */ /*++ */ /* Definitions used by PAL_FIXED_ADDR */ /*-- */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_fixed_addr { #pragma __nomember_alignment unsigned __int64 pal_fixed_addr$q_status; unsigned __int64 pal_fixed_addr$q_address; unsigned __int64 pal_fixed_addr$q_spare1; unsigned __int64 pal_fixed_addr$q_spare2; } PAL_FIXED_ADDR; /*++ */ /* Definitions used by PAL_MEM_ATTRIB */ /*-- */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_mem_attrib { #pragma __nomember_alignment unsigned __int64 pal_mem_attrib$q_status; __union { unsigned __int64 pal_mem_attrib$q_attrib; __struct { unsigned char pal_mem_attrib$b_attrib; } pal_mem_attrib$r_mem_attrib_fields; } pal_mem_attrib$r_mem_attrib_overla; unsigned __int64 pal_mem_attrib$q_spare1; unsigned __int64 pal_mem_attrib$q_spare2; } PAL_MEM_ATTRIB; #if !defined(__VAXC) #define pal_mem_attrib$q_attrib pal_mem_attrib$r_mem_attrib_overla.pal_mem_attrib$q_attrib #define pal_mem_attrib$b_attrib pal_mem_attrib$r_mem_attrib_overla.pal_mem_attrib$r_mem_attrib_fields.pal_mem_attrib$b_attrib #endif /* #if !defined(__VAXC) */ /*++ */ /* Definitions used by PAL_TR_READ */ /* (Not sure what AV, PV, DV, MV are for) */ /*-- */ #define PAL_TR_VALID$M_AV 0x1 #define PAL_TR_VALID$M_PV 0x2 #define PAL_TR_VALID$M_DV 0x4 #define PAL_TR_VALID$M_MV 0x8 #define PAL_TR_VALID$M_RSV1 0xFFFFFFF0 #define PAL_TR_VALID$M_RSV2 0xFFFFFFFF00000000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_tr_valid { #pragma __nomember_alignment unsigned __int64 pal_tr_valid$q_val; __struct { unsigned pal_tr_valid$v_av : 1; unsigned pal_tr_valid$v_pv : 1; unsigned pal_tr_valid$v_dv : 1; unsigned pal_tr_valid$v_mv : 1; unsigned pal_tr_valid$v_rsv1 : 28; unsigned pal_tr_valid$v_rsv2 : 32; } pal_tr_valid$r_tr_valid_bits; unsigned __int64 pal_tr_valid$q_spare1; unsigned __int64 pal_tr_valid$q_spare2; } PAL_TR_VALID; #if !defined(__VAXC) #define pal_tr_valid$v_av pal_tr_valid$r_tr_valid_bits.pal_tr_valid$v_av #define pal_tr_valid$v_pv pal_tr_valid$r_tr_valid_bits.pal_tr_valid$v_pv #define pal_tr_valid$v_dv pal_tr_valid$r_tr_valid_bits.pal_tr_valid$v_dv #define pal_tr_valid$v_mv pal_tr_valid$r_tr_valid_bits.pal_tr_valid$v_mv #define pal_tr_valid$v_rsv1 pal_tr_valid$r_tr_valid_bits.pal_tr_valid$v_rsv1 #define pal_tr_valid$v_rsv2 pal_tr_valid$r_tr_valid_bits.pal_tr_valid$v_rsv2 #endif /* #if !defined(__VAXC) */ /*++ */ /* Definitions used by PAL_LOGICAL_TO_PHYSICAL */ /*-- */ #define PAL_LOG_TO_PHY$M_NUM_LOG 0xFFFF #define PAL_LOG_TO_PHY$M_TPC 0xFF0000 #define PAL_LOG_TO_PHY$M_RSV1 0xFF000000 #define PAL_LOG_TO_PHY$M_CPP 0xFF00000000 #define PAL_LOG_TO_PHY$M_RSV2 0xFF0000000000 #define PAL_LOG_TO_PHY$M_PPID 0xFF000000000000 #define PAL_LOG_TO_PHY$M_RSV3 0xFF00000000000000 #define PAL_LOG_TO_PHY$M_TID 0xFFFF #define PAL_LOG_TO_PHY$M_RSV4 0xFFFF0000 #define PAL_LOG_TO_PHY$M_CID 0xFFFF00000000 #define PAL_LOG_TO_PHY$M_RSV5 0xFFFF000000000000 #define PAL_LOG_TO_PHY$M_LA 0xFFFF #define PAL_LOG_TO_PHY$M_RSV6 0xFFFF0000 #define PAL_LOG_TO_PHY$M_RSV7 0xFFFFFFFF00000000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _pal_log_to_phy { #pragma __nomember_alignment unsigned __int64 pal_log_to_phy$q_status; __struct { unsigned pal_log_to_phy$v_num_log : 16; unsigned pal_log_to_phy$v_tpc : 8; unsigned pal_log_to_phy$v_rsv1 : 8; unsigned pal_log_to_phy$v_cpp : 8; unsigned pal_log_to_phy$v_rsv2 : 8; unsigned pal_log_to_phy$v_ppid : 8; unsigned pal_log_to_phy$v_rsv3 : 8; } pal_log_to_phy$r_log_overview; __struct { unsigned pal_log_to_phy$v_tid : 16; unsigned pal_log_to_phy$v_rsv4 : 16; unsigned pal_log_to_phy$v_cid : 16; unsigned pal_log_to_phy$v_rsv5 : 16; } pal_log_to_phy$r_log_info1; __struct { unsigned pal_log_to_phy$v_la : 16; unsigned pal_log_to_phy$v_rsv6 : 16; unsigned pal_log_to_phy$v_rsv7 : 32; } pal_log_to_phy$r_log_info2; } PAL_LOG_TO_PHY; #if !defined(__VAXC) #define pal_log_to_phy$v_num_log pal_log_to_phy$r_log_overview.pal_log_to_phy$v_num_log #define pal_log_to_phy$v_tpc pal_log_to_phy$r_log_overview.pal_log_to_phy$v_tpc #define pal_log_to_phy$v_cpp pal_log_to_phy$r_log_overview.pal_log_to_phy$v_cpp #define pal_log_to_phy$v_ppid pal_log_to_phy$r_log_overview.pal_log_to_phy$v_ppid #define pal_log_to_phy$v_tid pal_log_to_phy$r_log_info1.pal_log_to_phy$v_tid #define pal_log_to_phy$v_cid pal_log_to_phy$r_log_info1.pal_log_to_phy$v_cid #define pal_log_to_phy$v_la pal_log_to_phy$r_log_info2.pal_log_to_phy$v_la #endif /* #if !defined(__VAXC) */ #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __IA64_PALDEF_LOADED */