/***************************************************************************/ /** **/ /** HPE CONFIDENTIAL. This software is confidential proprietary software **/ /** licensed by Hewlett-Packard Enterprise Development, LP, and is not **/ /** authorized to be used, duplicated OR disclosed to anyone without the **/ /** prior written permission of HPE. **/ /** © 2023 Copyright Hewlett-Packard Enterprise Development, LP **/ /** **/ /** VMS SOFTWARE, INC. CONFIDENTIAL. This software is confidential **/ /** proprietary software licensed by VMS Software, Inc., and is not **/ /** authorized to be used, duplicated or disclosed to anyone without **/ /** the prior written permission of VMS Software, Inc. **/ /** © 2023 Copyright VMS Software, Inc. **/ /** **/ /***************************************************************************/ /********************************************************************************************************************************/ /* Created: 9-Nov-2023 12:06:45 by OpenVMS SDL V3.7 */ /* Source: 14-OCT-2004 11:06:01 $1$DGA8345:[LIB_H.SRC]IA64_MCHKDEF.SDL;1 */ /********************************************************************************************************************************/ /*** MODULE $IA64_MCHKDEF ***/ #ifndef __IA64_MCHKDEF_LOADED #define __IA64_MCHKDEF_LOADED 1 #pragma __nostandard /* This file uses non-ANSI-Standard features */ #pragma __member_alignment __save #pragma __nomember_alignment #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __save /* Save the previously-defined required ptr size */ #pragma __required_pointer_size __short /* And set ptr size default to 32-bit pointers */ #endif #ifdef __cplusplus extern "C" { #define __unknown_params ... #define __optional_params ... #else #define __unknown_params #define __optional_params ... #endif #ifndef __struct #if !defined(__VAXC) #define __struct struct #else #define __struct variant_struct #endif #endif #ifndef __union #if !defined(__VAXC) #define __union union #else #define __union variant_union #endif #endif /*++ */ /* SAL Record Header */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.1, pp. B-2 */ /* */ /* (RHD - Record Header) */ /*-- */ #define SAL_RHD$M_OEM_SYS_ID_VALID 0x1 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_rhd { #pragma __nomember_alignment unsigned __int64 sal_rhd$q_rec_id; __union { unsigned short int sal_rhd$w_rev; __struct { unsigned char sal_rhd$b_minor_rev; unsigned char sal_rhd$b_major_rev; } sal_rhd$r_rev_fields; } sal_rhd$r_rev_overlay; unsigned char sal_rhd$b_err_severity; __union { unsigned char sal_rhd$b_valid; __struct { unsigned sal_rhd$v_oem_sys_id_valid : 1; unsigned sal_rhd$v_reserved : 7; } sal_rhd$r_valid_fields; } sal_rhd$r_valid_overlay; unsigned int sal_rhd$l_rec_len; __union { unsigned __int64 sal_rhd$q_timestamp; __struct { unsigned char sal_rhd$b_seconds; unsigned char sal_rhd$b_minutes; unsigned char sal_rhd$b_hours; unsigned char sal_rhd$b_reserved_1; unsigned char sal_rhd$b_day; unsigned char sal_rhd$b_month; unsigned char sal_rhd$b_year; unsigned char sal_rhd$b_century; } sal_rhd$r_timestamp_fields; } sal_rhd$r_timestamp_overlay; __union { unsigned int sal_rhd$o_oem_sys_id [4]; __struct { unsigned __int64 sal_rhd$q_oem_sys_id_l; unsigned __int64 sal_rhd$q_oem_sys_id_h; } sal_rhd$r_oem_sys_id_fields; } sal_rhd$r_oem_sys_id_overlay; } SAL_RHD; #if !defined(__VAXC) #define sal_rhd$w_rev sal_rhd$r_rev_overlay.sal_rhd$w_rev #define sal_rhd$b_minor_rev sal_rhd$r_rev_overlay.sal_rhd$r_rev_fields.sal_rhd$b_minor_rev #define sal_rhd$b_major_rev sal_rhd$r_rev_overlay.sal_rhd$r_rev_fields.sal_rhd$b_major_rev #define sal_rhd$b_valid sal_rhd$r_valid_overlay.sal_rhd$b_valid #define sal_rhd$v_oem_sys_id_valid sal_rhd$r_valid_overlay.sal_rhd$r_valid_fields.sal_rhd$v_oem_sys_id_valid #define sal_rhd$q_timestamp sal_rhd$r_timestamp_overlay.sal_rhd$q_timestamp #define sal_rhd$b_seconds sal_rhd$r_timestamp_overlay.sal_rhd$r_timestamp_fields.sal_rhd$b_seconds #define sal_rhd$b_minutes sal_rhd$r_timestamp_overlay.sal_rhd$r_timestamp_fields.sal_rhd$b_minutes #define sal_rhd$b_hours sal_rhd$r_timestamp_overlay.sal_rhd$r_timestamp_fields.sal_rhd$b_hours #define sal_rhd$b_day sal_rhd$r_timestamp_overlay.sal_rhd$r_timestamp_fields.sal_rhd$b_day #define sal_rhd$b_month sal_rhd$r_timestamp_overlay.sal_rhd$r_timestamp_fields.sal_rhd$b_month #define sal_rhd$b_year sal_rhd$r_timestamp_overlay.sal_rhd$r_timestamp_fields.sal_rhd$b_year #define sal_rhd$b_century sal_rhd$r_timestamp_overlay.sal_rhd$r_timestamp_fields.sal_rhd$b_century #define sal_rhd$o_oem_sys_id sal_rhd$r_oem_sys_id_overlay.sal_rhd$o_oem_sys_id #define sal_rhd$q_oem_sys_id_l sal_rhd$r_oem_sys_id_overlay.sal_rhd$r_oem_sys_id_fields.sal_rhd$q_oem_sys_id_l #define sal_rhd$q_oem_sys_id_h sal_rhd$r_oem_sys_id_overlay.sal_rhd$r_oem_sys_id_fields.sal_rhd$q_oem_sys_id_h #endif /* #if !defined(__VAXC) */ #define SAL_RHD$FRAME_SIZE 40 /*++ */ /* SAL GUID Structure */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Table B-1, pp. B-3 */ /* */ /* (GUID - Global Unique ID) */ /*-- */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_guid { #pragma __nomember_alignment __union { unsigned int sal_guid$o_guid [4]; __struct { unsigned __int64 sal_guid$q_guid_l; unsigned __int64 sal_guid$q_guid_h; } sal_guid$r_guid_lh_fields; __struct { unsigned int sal_guid$l_guid_data1; unsigned short int sal_guid$w_guid_data2; unsigned short int sal_guid$w_guid_data3; __union { unsigned __int64 sal_guid$q_guid_data4; __struct { unsigned char sal_guid$b_guid_data4_0; unsigned char sal_guid$b_guid_data4_1; unsigned char sal_guid$b_guid_data4_2; unsigned char sal_guid$b_guid_data4_3; unsigned char sal_guid$b_guid_data4_4; unsigned char sal_guid$b_guid_data4_5; unsigned char sal_guid$b_guid_data4_6; unsigned char sal_guid$b_guid_data4_7; } sal_guid$r_guid_data4_fields; } sal_guid$r_guid_data4_overlay; } sal_guid$r_guid_fields; } sal_guid$r_guid_overlay; } SAL_GUID; #if !defined(__VAXC) #define sal_guid$o_guid sal_guid$r_guid_overlay.sal_guid$o_guid #define sal_guid$q_guid_l sal_guid$r_guid_overlay.sal_guid$r_guid_lh_fields.sal_guid$q_guid_l #define sal_guid$q_guid_h sal_guid$r_guid_overlay.sal_guid$r_guid_lh_fields.sal_guid$q_guid_h #define sal_guid$l_guid_data1 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$l_guid_data1 #define sal_guid$w_guid_data2 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$w_guid_data2 #define sal_guid$w_guid_data3 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$w_guid_data3 #define sal_guid$q_guid_data4 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$r_guid_data4_overlay.sal_guid$q_guid_data4 #define sal_guid$b_guid_data4_0 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$r_guid_data4_overlay.sal_guid$r_guid_data4_\ fields.sal_guid$b_guid_data4_0 #define sal_guid$b_guid_data4_1 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$r_guid_data4_overlay.sal_guid$r_guid_data4_\ fields.sal_guid$b_guid_data4_1 #define sal_guid$b_guid_data4_2 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$r_guid_data4_overlay.sal_guid$r_guid_data4_\ fields.sal_guid$b_guid_data4_2 #define sal_guid$b_guid_data4_3 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$r_guid_data4_overlay.sal_guid$r_guid_data4_\ fields.sal_guid$b_guid_data4_3 #define sal_guid$b_guid_data4_4 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$r_guid_data4_overlay.sal_guid$r_guid_data4_\ fields.sal_guid$b_guid_data4_4 #define sal_guid$b_guid_data4_5 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$r_guid_data4_overlay.sal_guid$r_guid_data4_\ fields.sal_guid$b_guid_data4_5 #define sal_guid$b_guid_data4_6 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$r_guid_data4_overlay.sal_guid$r_guid_data4_\ fields.sal_guid$b_guid_data4_6 #define sal_guid$b_guid_data4_7 sal_guid$r_guid_overlay.sal_guid$r_guid_fields.sal_guid$r_guid_data4_overlay.sal_guid$r_guid_data4_\ fields.sal_guid$b_guid_data4_7 #endif /* #if !defined(__VAXC) */ #define SAL_GUID$K_LENGTH 16 /*++ */ /* SAL Section Header */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.2, pp. B-2 - B-3 */ /* */ /* (SHD - Section Header) */ /*-- */ #define SAL_SHD$M_ERR_CORRECTED 0x1 #define SAL_SHD$M_CONTAINMENT_WARNING 0x2 #define SAL_SHD$M_MUST_RESET 0x4 #define SAL_SHD$M_ERR_THRESH_EXCEED 0x8 #define SAL_SHD$M_RESOURCE_UNAVAIL 0x10 #define SAL_SHD$M_REMAINING_BITS_VALID 0x80 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_shd { #pragma __nomember_alignment SAL_GUID sal_shd$r_guid; __union { unsigned short int sal_shd$w_rev; __struct { unsigned char sal_shd$b_minor_rev; unsigned char sal_shd$b_major_rev; } sal_shd$r_rev_fields; } sal_shd$r_rev_overlay; __union { unsigned char sal_shd$b_err_recovery; __struct { unsigned sal_shd$v_err_corrected : 1; unsigned sal_shd$v_containment_warning : 1; unsigned sal_shd$v_must_reset : 1; unsigned sal_shd$v_err_thresh_exceed : 1; unsigned sal_shd$v_resource_unavail : 1; unsigned sal_shd$v_reserved : 2; unsigned sal_shd$v_remaining_bits_valid : 1; } sal_shd$r_err_recovery_fields; } sal_shd$r_err_recovery_overlay; unsigned char sal_shd$b_reserved_1; unsigned int sal_shd$l_section_len; } SAL_SHD; #if !defined(__VAXC) #define sal_shd$w_rev sal_shd$r_rev_overlay.sal_shd$w_rev #define sal_shd$b_minor_rev sal_shd$r_rev_overlay.sal_shd$r_rev_fields.sal_shd$b_minor_rev #define sal_shd$b_major_rev sal_shd$r_rev_overlay.sal_shd$r_rev_fields.sal_shd$b_major_rev #define sal_shd$b_err_recovery sal_shd$r_err_recovery_overlay.sal_shd$b_err_recovery #define sal_shd$v_err_corrected sal_shd$r_err_recovery_overlay.sal_shd$r_err_recovery_fields.sal_shd$v_err_corrected #define sal_shd$v_containment_warning sal_shd$r_err_recovery_overlay.sal_shd$r_err_recovery_fields.sal_shd$v_containment_warning #define sal_shd$v_must_reset sal_shd$r_err_recovery_overlay.sal_shd$r_err_recovery_fields.sal_shd$v_must_reset #define sal_shd$v_err_thresh_exceed sal_shd$r_err_recovery_overlay.sal_shd$r_err_recovery_fields.sal_shd$v_err_thresh_exceed #define sal_shd$v_resource_unavail sal_shd$r_err_recovery_overlay.sal_shd$r_err_recovery_fields.sal_shd$v_resource_unavail #define sal_shd$v_remaining_bits_valid sal_shd$r_err_recovery_overlay.sal_shd$r_err_recovery_fields.sal_shd$v_remaining_bits_valid #endif /* #if !defined(__VAXC) */ #define SAL_SHD$FRAME_SIZE 24 /*++ */ /* SAL Processor Device Error Info Section - Header Structure */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.3, pp. B-4 - B-5 */ /* */ /* (PHD - Processor Header) */ /*-- */ #define SAL_PHD$M_PROC_ERR_MAP_VALID 0x1 #define SAL_PHD$M_PROC_STATE_PARAM_VALID 0x2 #define SAL_PHD$M_PROC_CR_LID_VALID 0x4 #define SAL_PHD$M_PSI_STATIC_VALID 0x8 #define SAL_PHD$M_CPUID_INFO_VALID 0x1000000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_phd { #pragma __nomember_alignment SAL_SHD sal_phd$r_sal_shd; __union { unsigned __int64 sal_phd$q_valid; __struct { unsigned sal_phd$v_proc_err_map_valid : 1; unsigned sal_phd$v_proc_state_param_valid : 1; unsigned sal_phd$v_proc_cr_lid_valid : 1; unsigned sal_phd$v_psi_static_valid : 1; unsigned sal_phd$v_cache_check_num : 4; unsigned sal_phd$v_tlb_check_num : 4; unsigned sal_phd$v_bus_check_num : 4; unsigned sal_phd$v_reg_file_check_num : 4; unsigned sal_phd$v_ms_check_num : 4; unsigned sal_phd$v_cpuid_info_valid : 1; unsigned sal_phd$v_reserved_1 : 32; unsigned sal_phd$v_reserved_2 : 7; } sal_phd$r_valid_fields; } sal_phd$r_valid_overlay; unsigned __int64 sal_phd$q_proc_err_map; unsigned __int64 sal_phd$q_proc_state_param; unsigned __int64 sal_phd$q_proc_cr_lid; } SAL_PHD; #if !defined(__VAXC) #define sal_phd$q_valid sal_phd$r_valid_overlay.sal_phd$q_valid #define sal_phd$v_proc_err_map_valid sal_phd$r_valid_overlay.sal_phd$r_valid_fields.sal_phd$v_proc_err_map_valid #define sal_phd$v_proc_state_param_valid sal_phd$r_valid_overlay.sal_phd$r_valid_fields.sal_phd$v_proc_state_param_valid #define sal_phd$v_proc_cr_lid_valid sal_phd$r_valid_overlay.sal_phd$r_valid_fields.sal_phd$v_proc_cr_lid_valid #define sal_phd$v_psi_static_valid sal_phd$r_valid_overlay.sal_phd$r_valid_fields.sal_phd$v_psi_static_valid #define sal_phd$v_cache_check_num sal_phd$r_valid_overlay.sal_phd$r_valid_fields.sal_phd$v_cache_check_num #define sal_phd$v_tlb_check_num sal_phd$r_valid_overlay.sal_phd$r_valid_fields.sal_phd$v_tlb_check_num #define sal_phd$v_bus_check_num sal_phd$r_valid_overlay.sal_phd$r_valid_fields.sal_phd$v_bus_check_num #define sal_phd$v_reg_file_check_num sal_phd$r_valid_overlay.sal_phd$r_valid_fields.sal_phd$v_reg_file_check_num #define sal_phd$v_ms_check_num sal_phd$r_valid_overlay.sal_phd$r_valid_fields.sal_phd$v_ms_check_num #define sal_phd$v_cpuid_info_valid sal_phd$r_valid_overlay.sal_phd$r_valid_fields.sal_phd$v_cpuid_info_valid #endif /* #if !defined(__VAXC) */ #define SAL_PHD$FRAME_SIZE 56 /*++ */ /* SAL Processor Device Error Info Section - ID Structure */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.3, pp. B-5 */ /* */ /* (PIDS - Processor ID Structure) */ /*-- */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_pids { #pragma __nomember_alignment __union { unsigned __int64 sal_pids$q_cpuid [5]; __struct { unsigned __int64 sal_pids$q_cpuid0; unsigned __int64 sal_pids$q_cpuid1; unsigned __int64 sal_pids$q_cpuid2; unsigned __int64 sal_pids$q_cpuid3; unsigned __int64 sal_pids$q_cpuid4; } sal_pids$r_cpuid_fields; } sal_pids$r_cpuid_overlay; unsigned __int64 sal_pids$q_reserved_1; } SAL_PIDS; #if !defined(__VAXC) #define sal_pids$q_cpuid sal_pids$r_cpuid_overlay.sal_pids$q_cpuid #define sal_pids$q_cpuid0 sal_pids$r_cpuid_overlay.sal_pids$r_cpuid_fields.sal_pids$q_cpuid0 #define sal_pids$q_cpuid1 sal_pids$r_cpuid_overlay.sal_pids$r_cpuid_fields.sal_pids$q_cpuid1 #define sal_pids$q_cpuid2 sal_pids$r_cpuid_overlay.sal_pids$r_cpuid_fields.sal_pids$q_cpuid2 #define sal_pids$q_cpuid3 sal_pids$r_cpuid_overlay.sal_pids$r_cpuid_fields.sal_pids$q_cpuid3 #define sal_pids$q_cpuid4 sal_pids$r_cpuid_overlay.sal_pids$r_cpuid_fields.sal_pids$q_cpuid4 #endif /* #if !defined(__VAXC) */ #define SAL_PIDS$FRAME_SIZE 48 /*++ */ /* Min-State Save Area */ /* */ /* "Intel IA-64 Architecture Software Developer's Manual, July 2000" */ /* Section 11.3.2.3, Figure 11-11, pp. 11-19 */ /* */ /* (MSSAS - Min-State Save Area Structure) */ /*-- */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_mssas { #pragma __nomember_alignment unsigned __int64 sal_mssas$q_nat_for_saved_gr; unsigned __int64 sal_mssas$q_gr1; unsigned __int64 sal_mssas$q_gr2; unsigned __int64 sal_mssas$q_gr3; unsigned __int64 sal_mssas$q_gr4; unsigned __int64 sal_mssas$q_gr5; unsigned __int64 sal_mssas$q_gr6; unsigned __int64 sal_mssas$q_gr7; unsigned __int64 sal_mssas$q_gr8; unsigned __int64 sal_mssas$q_gr9; unsigned __int64 sal_mssas$q_gr10; unsigned __int64 sal_mssas$q_gr11; unsigned __int64 sal_mssas$q_gr12; unsigned __int64 sal_mssas$q_gr13; unsigned __int64 sal_mssas$q_gr14; unsigned __int64 sal_mssas$q_gr15; unsigned __int64 sal_mssas$q_bank0_gr16; unsigned __int64 sal_mssas$q_bank0_gr17; unsigned __int64 sal_mssas$q_bank0_gr18; unsigned __int64 sal_mssas$q_bank0_gr19; unsigned __int64 sal_mssas$q_bank0_gr20; unsigned __int64 sal_mssas$q_bank0_gr21; unsigned __int64 sal_mssas$q_bank0_gr22; unsigned __int64 sal_mssas$q_bank0_gr23; unsigned __int64 sal_mssas$q_bank0_gr24; unsigned __int64 sal_mssas$q_bank0_gr25; unsigned __int64 sal_mssas$q_bank0_gr26; unsigned __int64 sal_mssas$q_bank0_gr27; unsigned __int64 sal_mssas$q_bank0_gr28; unsigned __int64 sal_mssas$q_bank0_gr29; unsigned __int64 sal_mssas$q_bank0_gr30; unsigned __int64 sal_mssas$q_bank0_gr31; unsigned __int64 sal_mssas$q_bank1_gr16; unsigned __int64 sal_mssas$q_bank1_gr17; unsigned __int64 sal_mssas$q_bank1_gr18; unsigned __int64 sal_mssas$q_bank1_gr19; unsigned __int64 sal_mssas$q_bank1_gr20; unsigned __int64 sal_mssas$q_bank1_gr21; unsigned __int64 sal_mssas$q_bank1_gr22; unsigned __int64 sal_mssas$q_bank1_gr23; unsigned __int64 sal_mssas$q_bank1_gr24; unsigned __int64 sal_mssas$q_bank1_gr25; unsigned __int64 sal_mssas$q_bank1_gr26; unsigned __int64 sal_mssas$q_bank1_gr27; unsigned __int64 sal_mssas$q_bank1_gr28; unsigned __int64 sal_mssas$q_bank1_gr29; unsigned __int64 sal_mssas$q_bank1_gr30; unsigned __int64 sal_mssas$q_bank1_gr31; unsigned __int64 sal_mssas$q_predicate_regs; unsigned __int64 sal_mssas$q_br0; unsigned __int64 sal_mssas$q_rsc; unsigned __int64 sal_mssas$q_iip; unsigned __int64 sal_mssas$q_ipsr; unsigned __int64 sal_mssas$q_ifs; unsigned __int64 sal_mssas$q_xip; unsigned __int64 sal_mssas$q_xpsr; unsigned __int64 sal_mssas$q_xfs; unsigned __int64 sal_mssas$q_reserved_1 [71]; } SAL_MSSAS; #define SAL_MSSAS$FRAME_SIZE 1024 /*++ */ /* SAL Processor Device Error Info Section - Static Structure */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.3, pp. B-5 */ /* */ /* (PSS - Processor Static Structure) */ /*-- */ #define SAL_PSS$M_MINSTATE_VALID 0x1 #define SAL_PSS$M_BR_VALID 0x2 #define SAL_PSS$M_CR_VALID 0x4 #define SAL_PSS$M_AR_VALID 0x8 #define SAL_PSS$M_RR_VALID 0x10 #define SAL_PSS$M_FR_VALID 0x20 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_pss { #pragma __nomember_alignment __union { unsigned __int64 sal_pss$q_valid; __struct { unsigned sal_pss$v_minstate_valid : 1; unsigned sal_pss$v_br_valid : 1; unsigned sal_pss$v_cr_valid : 1; unsigned sal_pss$v_ar_valid : 1; unsigned sal_pss$v_rr_valid : 1; unsigned sal_pss$v_fr_valid : 1; unsigned sal_pss$v_reserved_1 : 32; unsigned sal_pss$v_reserved_2 : 26; } sal_pss$r_valid_fields; } sal_pss$r_valid_overlay; SAL_MSSAS sal_pss$r_min_state; __union { unsigned __int64 sal_pss$q_branch_regs [8]; __struct { unsigned __int64 sal_pss$q_br0; unsigned __int64 sal_pss$q_br1; unsigned __int64 sal_pss$q_br2; unsigned __int64 sal_pss$q_br3; unsigned __int64 sal_pss$q_br4; unsigned __int64 sal_pss$q_br5; unsigned __int64 sal_pss$q_br6; unsigned __int64 sal_pss$q_br7; } sal_pss$r_branch_regs_fields; } sal_pss$r_branch_regs_overlay; __union { unsigned __int64 sal_pss$q_control_regs [128]; __struct { unsigned __int64 sal_pss$q_cr0; unsigned __int64 sal_pss$q_cr1; unsigned __int64 sal_pss$q_cr2; unsigned __int64 sal_pss$q_cr3; unsigned __int64 sal_pss$q_cr4; unsigned __int64 sal_pss$q_cr5; unsigned __int64 sal_pss$q_cr6; unsigned __int64 sal_pss$q_cr7; unsigned __int64 sal_pss$q_cr8; unsigned __int64 sal_pss$q_cr9; unsigned __int64 sal_pss$q_cr10; unsigned __int64 sal_pss$q_cr11; unsigned __int64 sal_pss$q_cr12; unsigned __int64 sal_pss$q_cr13; unsigned __int64 sal_pss$q_cr14; unsigned __int64 sal_pss$q_cr15; unsigned __int64 sal_pss$q_cr16; unsigned __int64 sal_pss$q_cr17; unsigned __int64 sal_pss$q_cr18; unsigned __int64 sal_pss$q_cr19; unsigned __int64 sal_pss$q_cr20; unsigned __int64 sal_pss$q_cr21; unsigned __int64 sal_pss$q_cr22; unsigned __int64 sal_pss$q_cr23; unsigned __int64 sal_pss$q_cr24; unsigned __int64 sal_pss$q_cr25; unsigned __int64 sal_pss$q_cr26; unsigned __int64 sal_pss$q_cr27; unsigned __int64 sal_pss$q_cr28; unsigned __int64 sal_pss$q_cr29; unsigned __int64 sal_pss$q_cr30; unsigned __int64 sal_pss$q_cr31; unsigned __int64 sal_pss$q_cr32; unsigned __int64 sal_pss$q_cr33; unsigned __int64 sal_pss$q_cr34; unsigned __int64 sal_pss$q_cr35; unsigned __int64 sal_pss$q_cr36; unsigned __int64 sal_pss$q_cr37; unsigned __int64 sal_pss$q_cr38; unsigned __int64 sal_pss$q_cr39; unsigned __int64 sal_pss$q_cr40; unsigned __int64 sal_pss$q_cr41; unsigned __int64 sal_pss$q_cr42; unsigned __int64 sal_pss$q_cr43; unsigned __int64 sal_pss$q_cr44; unsigned __int64 sal_pss$q_cr45; unsigned __int64 sal_pss$q_cr46; unsigned __int64 sal_pss$q_cr47; unsigned __int64 sal_pss$q_cr48; unsigned __int64 sal_pss$q_cr49; unsigned __int64 sal_pss$q_cr50; unsigned __int64 sal_pss$q_cr51; unsigned __int64 sal_pss$q_cr52; unsigned __int64 sal_pss$q_cr53; unsigned __int64 sal_pss$q_cr54; unsigned __int64 sal_pss$q_cr55; unsigned __int64 sal_pss$q_cr56; unsigned __int64 sal_pss$q_cr57; unsigned __int64 sal_pss$q_cr58; unsigned __int64 sal_pss$q_cr59; unsigned __int64 sal_pss$q_cr60; unsigned __int64 sal_pss$q_cr61; unsigned __int64 sal_pss$q_cr62; unsigned __int64 sal_pss$q_cr63; unsigned __int64 sal_pss$q_cr64; unsigned __int64 sal_pss$q_cr65; unsigned __int64 sal_pss$q_cr66; unsigned __int64 sal_pss$q_cr67; unsigned __int64 sal_pss$q_cr68; unsigned __int64 sal_pss$q_cr69; unsigned __int64 sal_pss$q_cr70; unsigned __int64 sal_pss$q_cr71; unsigned __int64 sal_pss$q_cr72; unsigned __int64 sal_pss$q_cr73; unsigned __int64 sal_pss$q_cr74; unsigned __int64 sal_pss$q_cr75; unsigned __int64 sal_pss$q_cr76; unsigned __int64 sal_pss$q_cr77; unsigned __int64 sal_pss$q_cr78; unsigned __int64 sal_pss$q_cr79; unsigned __int64 sal_pss$q_cr80; unsigned __int64 sal_pss$q_cr81; unsigned __int64 sal_pss$q_cr82; unsigned __int64 sal_pss$q_cr83; unsigned __int64 sal_pss$q_cr84; unsigned __int64 sal_pss$q_cr85; unsigned __int64 sal_pss$q_cr86; unsigned __int64 sal_pss$q_cr87; unsigned __int64 sal_pss$q_cr88; unsigned __int64 sal_pss$q_cr89; unsigned __int64 sal_pss$q_cr90; unsigned __int64 sal_pss$q_cr91; unsigned __int64 sal_pss$q_cr92; unsigned __int64 sal_pss$q_cr93; unsigned __int64 sal_pss$q_cr94; unsigned __int64 sal_pss$q_cr95; unsigned __int64 sal_pss$q_cr96; unsigned __int64 sal_pss$q_cr97; unsigned __int64 sal_pss$q_cr98; unsigned __int64 sal_pss$q_cr99; unsigned __int64 sal_pss$q_cr100; unsigned __int64 sal_pss$q_cr101; unsigned __int64 sal_pss$q_cr102; unsigned __int64 sal_pss$q_cr103; unsigned __int64 sal_pss$q_cr104; unsigned __int64 sal_pss$q_cr105; unsigned __int64 sal_pss$q_cr106; unsigned __int64 sal_pss$q_cr107; unsigned __int64 sal_pss$q_cr108; unsigned __int64 sal_pss$q_cr109; unsigned __int64 sal_pss$q_cr110; unsigned __int64 sal_pss$q_cr111; unsigned __int64 sal_pss$q_cr112; unsigned __int64 sal_pss$q_cr113; unsigned __int64 sal_pss$q_cr114; unsigned __int64 sal_pss$q_cr115; unsigned __int64 sal_pss$q_cr116; unsigned __int64 sal_pss$q_cr117; unsigned __int64 sal_pss$q_cr118; unsigned __int64 sal_pss$q_cr119; unsigned __int64 sal_pss$q_cr120; unsigned __int64 sal_pss$q_cr121; unsigned __int64 sal_pss$q_cr122; unsigned __int64 sal_pss$q_cr123; unsigned __int64 sal_pss$q_cr124; unsigned __int64 sal_pss$q_cr125; unsigned __int64 sal_pss$q_cr126; unsigned __int64 sal_pss$q_cr127; } sal_pss$r_control_regs_fields; } sal_pss$r_control_regs_overlay; __union { unsigned __int64 sal_pss$q_application_regs [128]; __struct { unsigned __int64 sal_pss$q_ar0; unsigned __int64 sal_pss$q_ar1; unsigned __int64 sal_pss$q_ar2; unsigned __int64 sal_pss$q_ar3; unsigned __int64 sal_pss$q_ar4; unsigned __int64 sal_pss$q_ar5; unsigned __int64 sal_pss$q_ar6; unsigned __int64 sal_pss$q_ar7; unsigned __int64 sal_pss$q_ar8; unsigned __int64 sal_pss$q_ar9; unsigned __int64 sal_pss$q_ar10; unsigned __int64 sal_pss$q_ar11; unsigned __int64 sal_pss$q_ar12; unsigned __int64 sal_pss$q_ar13; unsigned __int64 sal_pss$q_ar14; unsigned __int64 sal_pss$q_ar15; unsigned __int64 sal_pss$q_ar16; unsigned __int64 sal_pss$q_ar17; unsigned __int64 sal_pss$q_ar18; unsigned __int64 sal_pss$q_ar19; unsigned __int64 sal_pss$q_ar20; unsigned __int64 sal_pss$q_ar21; unsigned __int64 sal_pss$q_ar22; unsigned __int64 sal_pss$q_ar23; unsigned __int64 sal_pss$q_ar24; unsigned __int64 sal_pss$q_ar25; unsigned __int64 sal_pss$q_ar26; unsigned __int64 sal_pss$q_ar27; unsigned __int64 sal_pss$q_ar28; unsigned __int64 sal_pss$q_ar29; unsigned __int64 sal_pss$q_ar30; unsigned __int64 sal_pss$q_ar31; unsigned __int64 sal_pss$q_ar32; unsigned __int64 sal_pss$q_ar33; unsigned __int64 sal_pss$q_ar34; unsigned __int64 sal_pss$q_ar35; unsigned __int64 sal_pss$q_ar36; unsigned __int64 sal_pss$q_ar37; unsigned __int64 sal_pss$q_ar38; unsigned __int64 sal_pss$q_ar39; unsigned __int64 sal_pss$q_ar40; unsigned __int64 sal_pss$q_ar41; unsigned __int64 sal_pss$q_ar42; unsigned __int64 sal_pss$q_ar43; unsigned __int64 sal_pss$q_ar44; unsigned __int64 sal_pss$q_ar45; unsigned __int64 sal_pss$q_ar46; unsigned __int64 sal_pss$q_ar47; unsigned __int64 sal_pss$q_ar48; unsigned __int64 sal_pss$q_ar49; unsigned __int64 sal_pss$q_ar50; unsigned __int64 sal_pss$q_ar51; unsigned __int64 sal_pss$q_ar52; unsigned __int64 sal_pss$q_ar53; unsigned __int64 sal_pss$q_ar54; unsigned __int64 sal_pss$q_ar55; unsigned __int64 sal_pss$q_ar56; unsigned __int64 sal_pss$q_ar57; unsigned __int64 sal_pss$q_ar58; unsigned __int64 sal_pss$q_ar59; unsigned __int64 sal_pss$q_ar60; unsigned __int64 sal_pss$q_ar61; unsigned __int64 sal_pss$q_ar62; unsigned __int64 sal_pss$q_ar63; unsigned __int64 sal_pss$q_ar64; unsigned __int64 sal_pss$q_ar65; unsigned __int64 sal_pss$q_ar66; unsigned __int64 sal_pss$q_ar67; unsigned __int64 sal_pss$q_ar68; unsigned __int64 sal_pss$q_ar69; unsigned __int64 sal_pss$q_ar70; unsigned __int64 sal_pss$q_ar71; unsigned __int64 sal_pss$q_ar72; unsigned __int64 sal_pss$q_ar73; unsigned __int64 sal_pss$q_ar74; unsigned __int64 sal_pss$q_ar75; unsigned __int64 sal_pss$q_ar76; unsigned __int64 sal_pss$q_ar77; unsigned __int64 sal_pss$q_ar78; unsigned __int64 sal_pss$q_ar79; unsigned __int64 sal_pss$q_ar80; unsigned __int64 sal_pss$q_ar81; unsigned __int64 sal_pss$q_ar82; unsigned __int64 sal_pss$q_ar83; unsigned __int64 sal_pss$q_ar84; unsigned __int64 sal_pss$q_ar85; unsigned __int64 sal_pss$q_ar86; unsigned __int64 sal_pss$q_ar87; unsigned __int64 sal_pss$q_ar88; unsigned __int64 sal_pss$q_ar89; unsigned __int64 sal_pss$q_ar90; unsigned __int64 sal_pss$q_ar91; unsigned __int64 sal_pss$q_ar92; unsigned __int64 sal_pss$q_ar93; unsigned __int64 sal_pss$q_ar94; unsigned __int64 sal_pss$q_ar95; unsigned __int64 sal_pss$q_ar96; unsigned __int64 sal_pss$q_ar97; unsigned __int64 sal_pss$q_ar98; unsigned __int64 sal_pss$q_ar99; unsigned __int64 sal_pss$q_ar100; unsigned __int64 sal_pss$q_ar101; unsigned __int64 sal_pss$q_ar102; unsigned __int64 sal_pss$q_ar103; unsigned __int64 sal_pss$q_ar104; unsigned __int64 sal_pss$q_ar105; unsigned __int64 sal_pss$q_ar106; unsigned __int64 sal_pss$q_ar107; unsigned __int64 sal_pss$q_ar108; unsigned __int64 sal_pss$q_ar109; unsigned __int64 sal_pss$q_ar110; unsigned __int64 sal_pss$q_ar111; unsigned __int64 sal_pss$q_ar112; unsigned __int64 sal_pss$q_ar113; unsigned __int64 sal_pss$q_ar114; unsigned __int64 sal_pss$q_ar115; unsigned __int64 sal_pss$q_ar116; unsigned __int64 sal_pss$q_ar117; unsigned __int64 sal_pss$q_ar118; unsigned __int64 sal_pss$q_ar119; unsigned __int64 sal_pss$q_ar120; unsigned __int64 sal_pss$q_ar121; unsigned __int64 sal_pss$q_ar122; unsigned __int64 sal_pss$q_ar123; unsigned __int64 sal_pss$q_ar124; unsigned __int64 sal_pss$q_ar125; unsigned __int64 sal_pss$q_ar126; unsigned __int64 sal_pss$q_ar127; } sal_pss$r_application_regs_fields; } sal_pss$r_application_regs_overlay; __union { unsigned __int64 sal_pss$q_region_regs [8]; __struct { unsigned __int64 sal_pss$q_rr0; unsigned __int64 sal_pss$q_rr1; unsigned __int64 sal_pss$q_rr2; unsigned __int64 sal_pss$q_rr3; unsigned __int64 sal_pss$q_rr4; unsigned __int64 sal_pss$q_rr5; unsigned __int64 sal_pss$q_rr6; unsigned __int64 sal_pss$q_rr7; } sal_pss$r_region_regs_fields; } sal_pss$r_region_regs_overlay; __union { unsigned int sal_pss$o_fp_regs [128] [4]; __struct { unsigned int sal_pss$o_fp0 [4]; unsigned int sal_pss$o_fp1 [4]; unsigned int sal_pss$o_fp2 [4]; unsigned int sal_pss$o_fp3 [4]; unsigned int sal_pss$o_fp4 [4]; unsigned int sal_pss$o_fp5 [4]; unsigned int sal_pss$o_fp6 [4]; unsigned int sal_pss$o_fp7 [4]; unsigned int sal_pss$o_fp8 [4]; unsigned int sal_pss$o_fp9 [4]; unsigned int sal_pss$o_fp10 [4]; unsigned int sal_pss$o_fp11 [4]; unsigned int sal_pss$o_fp12 [4]; unsigned int sal_pss$o_fp13 [4]; unsigned int sal_pss$o_fp14 [4]; unsigned int sal_pss$o_fp15 [4]; unsigned int sal_pss$o_fp16 [4]; unsigned int sal_pss$o_fp17 [4]; unsigned int sal_pss$o_fp18 [4]; unsigned int sal_pss$o_fp19 [4]; unsigned int sal_pss$o_fp20 [4]; unsigned int sal_pss$o_fp21 [4]; unsigned int sal_pss$o_fp22 [4]; unsigned int sal_pss$o_fp23 [4]; unsigned int sal_pss$o_fp24 [4]; unsigned int sal_pss$o_fp25 [4]; unsigned int sal_pss$o_fp26 [4]; unsigned int sal_pss$o_fp27 [4]; unsigned int sal_pss$o_fp28 [4]; unsigned int sal_pss$o_fp29 [4]; unsigned int sal_pss$o_fp30 [4]; unsigned int sal_pss$o_fp31 [4]; unsigned int sal_pss$o_fp32 [4]; unsigned int sal_pss$o_fp33 [4]; unsigned int sal_pss$o_fp34 [4]; unsigned int sal_pss$o_fp35 [4]; unsigned int sal_pss$o_fp36 [4]; unsigned int sal_pss$o_fp37 [4]; unsigned int sal_pss$o_fp38 [4]; unsigned int sal_pss$o_fp39 [4]; unsigned int sal_pss$o_fp40 [4]; unsigned int sal_pss$o_fp41 [4]; unsigned int sal_pss$o_fp42 [4]; unsigned int sal_pss$o_fp43 [4]; unsigned int sal_pss$o_fp44 [4]; unsigned int sal_pss$o_fp45 [4]; unsigned int sal_pss$o_fp46 [4]; unsigned int sal_pss$o_fp47 [4]; unsigned int sal_pss$o_fp48 [4]; unsigned int sal_pss$o_fp49 [4]; unsigned int sal_pss$o_fp50 [4]; unsigned int sal_pss$o_fp51 [4]; unsigned int sal_pss$o_fp52 [4]; unsigned int sal_pss$o_fp53 [4]; unsigned int sal_pss$o_fp54 [4]; unsigned int sal_pss$o_fp55 [4]; unsigned int sal_pss$o_fp56 [4]; unsigned int sal_pss$o_fp57 [4]; unsigned int sal_pss$o_fp58 [4]; unsigned int sal_pss$o_fp59 [4]; unsigned int sal_pss$o_fp60 [4]; unsigned int sal_pss$o_fp61 [4]; unsigned int sal_pss$o_fp62 [4]; unsigned int sal_pss$o_fp63 [4]; unsigned int sal_pss$o_fp64 [4]; unsigned int sal_pss$o_fp65 [4]; unsigned int sal_pss$o_fp66 [4]; unsigned int sal_pss$o_fp67 [4]; unsigned int sal_pss$o_fp68 [4]; unsigned int sal_pss$o_fp69 [4]; unsigned int sal_pss$o_fp70 [4]; unsigned int sal_pss$o_fp71 [4]; unsigned int sal_pss$o_fp72 [4]; unsigned int sal_pss$o_fp73 [4]; unsigned int sal_pss$o_fp74 [4]; unsigned int sal_pss$o_fp75 [4]; unsigned int sal_pss$o_fp76 [4]; unsigned int sal_pss$o_fp77 [4]; unsigned int sal_pss$o_fp78 [4]; unsigned int sal_pss$o_fp79 [4]; unsigned int sal_pss$o_fp80 [4]; unsigned int sal_pss$o_fp81 [4]; unsigned int sal_pss$o_fp82 [4]; unsigned int sal_pss$o_fp83 [4]; unsigned int sal_pss$o_fp84 [4]; unsigned int sal_pss$o_fp85 [4]; unsigned int sal_pss$o_fp86 [4]; unsigned int sal_pss$o_fp87 [4]; unsigned int sal_pss$o_fp88 [4]; unsigned int sal_pss$o_fp89 [4]; unsigned int sal_pss$o_fp90 [4]; unsigned int sal_pss$o_fp91 [4]; unsigned int sal_pss$o_fp92 [4]; unsigned int sal_pss$o_fp93 [4]; unsigned int sal_pss$o_fp94 [4]; unsigned int sal_pss$o_fp95 [4]; unsigned int sal_pss$o_fp96 [4]; unsigned int sal_pss$o_fp97 [4]; unsigned int sal_pss$o_fp98 [4]; unsigned int sal_pss$o_fp99 [4]; unsigned int sal_pss$o_fp100 [4]; unsigned int sal_pss$o_fp101 [4]; unsigned int sal_pss$o_fp102 [4]; unsigned int sal_pss$o_fp103 [4]; unsigned int sal_pss$o_fp104 [4]; unsigned int sal_pss$o_fp105 [4]; unsigned int sal_pss$o_fp106 [4]; unsigned int sal_pss$o_fp107 [4]; unsigned int sal_pss$o_fp108 [4]; unsigned int sal_pss$o_fp109 [4]; unsigned int sal_pss$o_fp110 [4]; unsigned int sal_pss$o_fp111 [4]; unsigned int sal_pss$o_fp112 [4]; unsigned int sal_pss$o_fp113 [4]; unsigned int sal_pss$o_fp114 [4]; unsigned int sal_pss$o_fp115 [4]; unsigned int sal_pss$o_fp116 [4]; unsigned int sal_pss$o_fp117 [4]; unsigned int sal_pss$o_fp118 [4]; unsigned int sal_pss$o_fp119 [4]; unsigned int sal_pss$o_fp120 [4]; unsigned int sal_pss$o_fp121 [4]; unsigned int sal_pss$o_fp122 [4]; unsigned int sal_pss$o_fp123 [4]; unsigned int sal_pss$o_fp124 [4]; unsigned int sal_pss$o_fp125 [4]; unsigned int sal_pss$o_fp126 [4]; unsigned int sal_pss$o_fp127 [4]; } sal_pss$r_fp_regs_fields; } sal_pss$r_fp_regs_overlay; } SAL_PSS; #if !defined(__VAXC) #define sal_pss$q_valid sal_pss$r_valid_overlay.sal_pss$q_valid #define sal_pss$v_minstate_valid sal_pss$r_valid_overlay.sal_pss$r_valid_fields.sal_pss$v_minstate_valid #define sal_pss$v_br_valid sal_pss$r_valid_overlay.sal_pss$r_valid_fields.sal_pss$v_br_valid #define sal_pss$v_cr_valid sal_pss$r_valid_overlay.sal_pss$r_valid_fields.sal_pss$v_cr_valid #define sal_pss$v_ar_valid sal_pss$r_valid_overlay.sal_pss$r_valid_fields.sal_pss$v_ar_valid #define sal_pss$v_rr_valid sal_pss$r_valid_overlay.sal_pss$r_valid_fields.sal_pss$v_rr_valid #define sal_pss$v_fr_valid sal_pss$r_valid_overlay.sal_pss$r_valid_fields.sal_pss$v_fr_valid #define sal_pss$q_branch_regs sal_pss$r_branch_regs_overlay.sal_pss$q_branch_regs #define sal_pss$q_br0 sal_pss$r_branch_regs_overlay.sal_pss$r_branch_regs_fields.sal_pss$q_br0 #define sal_pss$q_br1 sal_pss$r_branch_regs_overlay.sal_pss$r_branch_regs_fields.sal_pss$q_br1 #define sal_pss$q_br2 sal_pss$r_branch_regs_overlay.sal_pss$r_branch_regs_fields.sal_pss$q_br2 #define sal_pss$q_br3 sal_pss$r_branch_regs_overlay.sal_pss$r_branch_regs_fields.sal_pss$q_br3 #define sal_pss$q_br4 sal_pss$r_branch_regs_overlay.sal_pss$r_branch_regs_fields.sal_pss$q_br4 #define sal_pss$q_br5 sal_pss$r_branch_regs_overlay.sal_pss$r_branch_regs_fields.sal_pss$q_br5 #define sal_pss$q_br6 sal_pss$r_branch_regs_overlay.sal_pss$r_branch_regs_fields.sal_pss$q_br6 #define sal_pss$q_br7 sal_pss$r_branch_regs_overlay.sal_pss$r_branch_regs_fields.sal_pss$q_br7 #define sal_pss$q_control_regs sal_pss$r_control_regs_overlay.sal_pss$q_control_regs #define sal_pss$q_cr0 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr0 #define sal_pss$q_cr1 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr1 #define sal_pss$q_cr2 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr2 #define sal_pss$q_cr3 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr3 #define sal_pss$q_cr4 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr4 #define sal_pss$q_cr5 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr5 #define sal_pss$q_cr6 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr6 #define sal_pss$q_cr7 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr7 #define sal_pss$q_cr8 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr8 #define sal_pss$q_cr9 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr9 #define sal_pss$q_cr10 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr10 #define sal_pss$q_cr11 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr11 #define sal_pss$q_cr12 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr12 #define sal_pss$q_cr13 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr13 #define sal_pss$q_cr14 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr14 #define sal_pss$q_cr15 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr15 #define sal_pss$q_cr16 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr16 #define sal_pss$q_cr17 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr17 #define sal_pss$q_cr18 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr18 #define sal_pss$q_cr19 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr19 #define sal_pss$q_cr20 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr20 #define sal_pss$q_cr21 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr21 #define sal_pss$q_cr22 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr22 #define sal_pss$q_cr23 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr23 #define sal_pss$q_cr24 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr24 #define sal_pss$q_cr25 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr25 #define sal_pss$q_cr26 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr26 #define sal_pss$q_cr27 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr27 #define sal_pss$q_cr28 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr28 #define sal_pss$q_cr29 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr29 #define sal_pss$q_cr30 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr30 #define sal_pss$q_cr31 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr31 #define sal_pss$q_cr32 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr32 #define sal_pss$q_cr33 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr33 #define sal_pss$q_cr34 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr34 #define sal_pss$q_cr35 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr35 #define sal_pss$q_cr36 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr36 #define sal_pss$q_cr37 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr37 #define sal_pss$q_cr38 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr38 #define sal_pss$q_cr39 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr39 #define sal_pss$q_cr40 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr40 #define sal_pss$q_cr41 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr41 #define sal_pss$q_cr42 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr42 #define sal_pss$q_cr43 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr43 #define sal_pss$q_cr44 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr44 #define sal_pss$q_cr45 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr45 #define sal_pss$q_cr46 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr46 #define sal_pss$q_cr47 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr47 #define sal_pss$q_cr48 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr48 #define sal_pss$q_cr49 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr49 #define sal_pss$q_cr50 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr50 #define sal_pss$q_cr51 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr51 #define sal_pss$q_cr52 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr52 #define sal_pss$q_cr53 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr53 #define sal_pss$q_cr54 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr54 #define sal_pss$q_cr55 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr55 #define sal_pss$q_cr56 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr56 #define sal_pss$q_cr57 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr57 #define sal_pss$q_cr58 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr58 #define sal_pss$q_cr59 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr59 #define sal_pss$q_cr60 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr60 #define sal_pss$q_cr61 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr61 #define sal_pss$q_cr62 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr62 #define sal_pss$q_cr63 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr63 #define sal_pss$q_cr64 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr64 #define sal_pss$q_cr65 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr65 #define sal_pss$q_cr66 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr66 #define sal_pss$q_cr67 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr67 #define sal_pss$q_cr68 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr68 #define sal_pss$q_cr69 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr69 #define sal_pss$q_cr70 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr70 #define sal_pss$q_cr71 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr71 #define sal_pss$q_cr72 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr72 #define sal_pss$q_cr73 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr73 #define sal_pss$q_cr74 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr74 #define sal_pss$q_cr75 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr75 #define sal_pss$q_cr76 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr76 #define sal_pss$q_cr77 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr77 #define sal_pss$q_cr78 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr78 #define sal_pss$q_cr79 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr79 #define sal_pss$q_cr80 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr80 #define sal_pss$q_cr81 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr81 #define sal_pss$q_cr82 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr82 #define sal_pss$q_cr83 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr83 #define sal_pss$q_cr84 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr84 #define sal_pss$q_cr85 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr85 #define sal_pss$q_cr86 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr86 #define sal_pss$q_cr87 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr87 #define sal_pss$q_cr88 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr88 #define sal_pss$q_cr89 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr89 #define sal_pss$q_cr90 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr90 #define sal_pss$q_cr91 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr91 #define sal_pss$q_cr92 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr92 #define sal_pss$q_cr93 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr93 #define sal_pss$q_cr94 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr94 #define sal_pss$q_cr95 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr95 #define sal_pss$q_cr96 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr96 #define sal_pss$q_cr97 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr97 #define sal_pss$q_cr98 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr98 #define sal_pss$q_cr99 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr99 #define sal_pss$q_cr100 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr100 #define sal_pss$q_cr101 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr101 #define sal_pss$q_cr102 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr102 #define sal_pss$q_cr103 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr103 #define sal_pss$q_cr104 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr104 #define sal_pss$q_cr105 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr105 #define sal_pss$q_cr106 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr106 #define sal_pss$q_cr107 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr107 #define sal_pss$q_cr108 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr108 #define sal_pss$q_cr109 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr109 #define sal_pss$q_cr110 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr110 #define sal_pss$q_cr111 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr111 #define sal_pss$q_cr112 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr112 #define sal_pss$q_cr113 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr113 #define sal_pss$q_cr114 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr114 #define sal_pss$q_cr115 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr115 #define sal_pss$q_cr116 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr116 #define sal_pss$q_cr117 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr117 #define sal_pss$q_cr118 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr118 #define sal_pss$q_cr119 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr119 #define sal_pss$q_cr120 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr120 #define sal_pss$q_cr121 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr121 #define sal_pss$q_cr122 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr122 #define sal_pss$q_cr123 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr123 #define sal_pss$q_cr124 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr124 #define sal_pss$q_cr125 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr125 #define sal_pss$q_cr126 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr126 #define sal_pss$q_cr127 sal_pss$r_control_regs_overlay.sal_pss$r_control_regs_fields.sal_pss$q_cr127 #define sal_pss$q_application_regs sal_pss$r_application_regs_overlay.sal_pss$q_application_regs #define sal_pss$q_ar0 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar0 #define sal_pss$q_ar1 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar1 #define sal_pss$q_ar2 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar2 #define sal_pss$q_ar3 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar3 #define sal_pss$q_ar4 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar4 #define sal_pss$q_ar5 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar5 #define sal_pss$q_ar6 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar6 #define sal_pss$q_ar7 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar7 #define sal_pss$q_ar8 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar8 #define sal_pss$q_ar9 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar9 #define sal_pss$q_ar10 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar10 #define sal_pss$q_ar11 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar11 #define sal_pss$q_ar12 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar12 #define sal_pss$q_ar13 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar13 #define sal_pss$q_ar14 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar14 #define sal_pss$q_ar15 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar15 #define sal_pss$q_ar16 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar16 #define sal_pss$q_ar17 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar17 #define sal_pss$q_ar18 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar18 #define sal_pss$q_ar19 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar19 #define sal_pss$q_ar20 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar20 #define sal_pss$q_ar21 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar21 #define sal_pss$q_ar22 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar22 #define sal_pss$q_ar23 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar23 #define sal_pss$q_ar24 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar24 #define sal_pss$q_ar25 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar25 #define sal_pss$q_ar26 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar26 #define sal_pss$q_ar27 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar27 #define sal_pss$q_ar28 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar28 #define sal_pss$q_ar29 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar29 #define sal_pss$q_ar30 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar30 #define sal_pss$q_ar31 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar31 #define sal_pss$q_ar32 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar32 #define sal_pss$q_ar33 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar33 #define sal_pss$q_ar34 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar34 #define sal_pss$q_ar35 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar35 #define sal_pss$q_ar36 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar36 #define sal_pss$q_ar37 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar37 #define sal_pss$q_ar38 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar38 #define sal_pss$q_ar39 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar39 #define sal_pss$q_ar40 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar40 #define sal_pss$q_ar41 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar41 #define sal_pss$q_ar42 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar42 #define sal_pss$q_ar43 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar43 #define sal_pss$q_ar44 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar44 #define sal_pss$q_ar45 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar45 #define sal_pss$q_ar46 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar46 #define sal_pss$q_ar47 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar47 #define sal_pss$q_ar48 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar48 #define sal_pss$q_ar49 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar49 #define sal_pss$q_ar50 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar50 #define sal_pss$q_ar51 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar51 #define sal_pss$q_ar52 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar52 #define sal_pss$q_ar53 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar53 #define sal_pss$q_ar54 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar54 #define sal_pss$q_ar55 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar55 #define sal_pss$q_ar56 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar56 #define sal_pss$q_ar57 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar57 #define sal_pss$q_ar58 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar58 #define sal_pss$q_ar59 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar59 #define sal_pss$q_ar60 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar60 #define sal_pss$q_ar61 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar61 #define sal_pss$q_ar62 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar62 #define sal_pss$q_ar63 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar63 #define sal_pss$q_ar64 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar64 #define sal_pss$q_ar65 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar65 #define sal_pss$q_ar66 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar66 #define sal_pss$q_ar67 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar67 #define sal_pss$q_ar68 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar68 #define sal_pss$q_ar69 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar69 #define sal_pss$q_ar70 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar70 #define sal_pss$q_ar71 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar71 #define sal_pss$q_ar72 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar72 #define sal_pss$q_ar73 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar73 #define sal_pss$q_ar74 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar74 #define sal_pss$q_ar75 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar75 #define sal_pss$q_ar76 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar76 #define sal_pss$q_ar77 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar77 #define sal_pss$q_ar78 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar78 #define sal_pss$q_ar79 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar79 #define sal_pss$q_ar80 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar80 #define sal_pss$q_ar81 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar81 #define sal_pss$q_ar82 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar82 #define sal_pss$q_ar83 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar83 #define sal_pss$q_ar84 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar84 #define sal_pss$q_ar85 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar85 #define sal_pss$q_ar86 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar86 #define sal_pss$q_ar87 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar87 #define sal_pss$q_ar88 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar88 #define sal_pss$q_ar89 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar89 #define sal_pss$q_ar90 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar90 #define sal_pss$q_ar91 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar91 #define sal_pss$q_ar92 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar92 #define sal_pss$q_ar93 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar93 #define sal_pss$q_ar94 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar94 #define sal_pss$q_ar95 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar95 #define sal_pss$q_ar96 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar96 #define sal_pss$q_ar97 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar97 #define sal_pss$q_ar98 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar98 #define sal_pss$q_ar99 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar99 #define sal_pss$q_ar100 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar100 #define sal_pss$q_ar101 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar101 #define sal_pss$q_ar102 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar102 #define sal_pss$q_ar103 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar103 #define sal_pss$q_ar104 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar104 #define sal_pss$q_ar105 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar105 #define sal_pss$q_ar106 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar106 #define sal_pss$q_ar107 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar107 #define sal_pss$q_ar108 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar108 #define sal_pss$q_ar109 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar109 #define sal_pss$q_ar110 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar110 #define sal_pss$q_ar111 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar111 #define sal_pss$q_ar112 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar112 #define sal_pss$q_ar113 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar113 #define sal_pss$q_ar114 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar114 #define sal_pss$q_ar115 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar115 #define sal_pss$q_ar116 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar116 #define sal_pss$q_ar117 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar117 #define sal_pss$q_ar118 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar118 #define sal_pss$q_ar119 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar119 #define sal_pss$q_ar120 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar120 #define sal_pss$q_ar121 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar121 #define sal_pss$q_ar122 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar122 #define sal_pss$q_ar123 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar123 #define sal_pss$q_ar124 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar124 #define sal_pss$q_ar125 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar125 #define sal_pss$q_ar126 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar126 #define sal_pss$q_ar127 sal_pss$r_application_regs_overlay.sal_pss$r_application_regs_fields.sal_pss$q_ar127 #define sal_pss$q_region_regs sal_pss$r_region_regs_overlay.sal_pss$q_region_regs #define sal_pss$q_rr0 sal_pss$r_region_regs_overlay.sal_pss$r_region_regs_fields.sal_pss$q_rr0 #define sal_pss$q_rr1 sal_pss$r_region_regs_overlay.sal_pss$r_region_regs_fields.sal_pss$q_rr1 #define sal_pss$q_rr2 sal_pss$r_region_regs_overlay.sal_pss$r_region_regs_fields.sal_pss$q_rr2 #define sal_pss$q_rr3 sal_pss$r_region_regs_overlay.sal_pss$r_region_regs_fields.sal_pss$q_rr3 #define sal_pss$q_rr4 sal_pss$r_region_regs_overlay.sal_pss$r_region_regs_fields.sal_pss$q_rr4 #define sal_pss$q_rr5 sal_pss$r_region_regs_overlay.sal_pss$r_region_regs_fields.sal_pss$q_rr5 #define sal_pss$q_rr6 sal_pss$r_region_regs_overlay.sal_pss$r_region_regs_fields.sal_pss$q_rr6 #define sal_pss$q_rr7 sal_pss$r_region_regs_overlay.sal_pss$r_region_regs_fields.sal_pss$q_rr7 #define sal_pss$o_fp_regs sal_pss$r_fp_regs_overlay.sal_pss$o_fp_regs #define sal_pss$o_fp0 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp0 #define sal_pss$o_fp1 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp1 #define sal_pss$o_fp2 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp2 #define sal_pss$o_fp3 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp3 #define sal_pss$o_fp4 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp4 #define sal_pss$o_fp5 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp5 #define sal_pss$o_fp6 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp6 #define sal_pss$o_fp7 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp7 #define sal_pss$o_fp8 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp8 #define sal_pss$o_fp9 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp9 #define sal_pss$o_fp10 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp10 #define sal_pss$o_fp11 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp11 #define sal_pss$o_fp12 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp12 #define sal_pss$o_fp13 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp13 #define sal_pss$o_fp14 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp14 #define sal_pss$o_fp15 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp15 #define sal_pss$o_fp16 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp16 #define sal_pss$o_fp17 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp17 #define sal_pss$o_fp18 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp18 #define sal_pss$o_fp19 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp19 #define sal_pss$o_fp20 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp20 #define sal_pss$o_fp21 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp21 #define sal_pss$o_fp22 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp22 #define sal_pss$o_fp23 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp23 #define sal_pss$o_fp24 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp24 #define sal_pss$o_fp25 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp25 #define sal_pss$o_fp26 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp26 #define sal_pss$o_fp27 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp27 #define sal_pss$o_fp28 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp28 #define sal_pss$o_fp29 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp29 #define sal_pss$o_fp30 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp30 #define sal_pss$o_fp31 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp31 #define sal_pss$o_fp32 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp32 #define sal_pss$o_fp33 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp33 #define sal_pss$o_fp34 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp34 #define sal_pss$o_fp35 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp35 #define sal_pss$o_fp36 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp36 #define sal_pss$o_fp37 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp37 #define sal_pss$o_fp38 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp38 #define sal_pss$o_fp39 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp39 #define sal_pss$o_fp40 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp40 #define sal_pss$o_fp41 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp41 #define sal_pss$o_fp42 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp42 #define sal_pss$o_fp43 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp43 #define sal_pss$o_fp44 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp44 #define sal_pss$o_fp45 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp45 #define sal_pss$o_fp46 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp46 #define sal_pss$o_fp47 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp47 #define sal_pss$o_fp48 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp48 #define sal_pss$o_fp49 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp49 #define sal_pss$o_fp50 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp50 #define sal_pss$o_fp51 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp51 #define sal_pss$o_fp52 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp52 #define sal_pss$o_fp53 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp53 #define sal_pss$o_fp54 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp54 #define sal_pss$o_fp55 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp55 #define sal_pss$o_fp56 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp56 #define sal_pss$o_fp57 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp57 #define sal_pss$o_fp58 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp58 #define sal_pss$o_fp59 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp59 #define sal_pss$o_fp60 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp60 #define sal_pss$o_fp61 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp61 #define sal_pss$o_fp62 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp62 #define sal_pss$o_fp63 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp63 #define sal_pss$o_fp64 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp64 #define sal_pss$o_fp65 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp65 #define sal_pss$o_fp66 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp66 #define sal_pss$o_fp67 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp67 #define sal_pss$o_fp68 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp68 #define sal_pss$o_fp69 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp69 #define sal_pss$o_fp70 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp70 #define sal_pss$o_fp71 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp71 #define sal_pss$o_fp72 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp72 #define sal_pss$o_fp73 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp73 #define sal_pss$o_fp74 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp74 #define sal_pss$o_fp75 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp75 #define sal_pss$o_fp76 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp76 #define sal_pss$o_fp77 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp77 #define sal_pss$o_fp78 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp78 #define sal_pss$o_fp79 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp79 #define sal_pss$o_fp80 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp80 #define sal_pss$o_fp81 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp81 #define sal_pss$o_fp82 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp82 #define sal_pss$o_fp83 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp83 #define sal_pss$o_fp84 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp84 #define sal_pss$o_fp85 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp85 #define sal_pss$o_fp86 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp86 #define sal_pss$o_fp87 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp87 #define sal_pss$o_fp88 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp88 #define sal_pss$o_fp89 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp89 #define sal_pss$o_fp90 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp90 #define sal_pss$o_fp91 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp91 #define sal_pss$o_fp92 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp92 #define sal_pss$o_fp93 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp93 #define sal_pss$o_fp94 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp94 #define sal_pss$o_fp95 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp95 #define sal_pss$o_fp96 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp96 #define sal_pss$o_fp97 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp97 #define sal_pss$o_fp98 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp98 #define sal_pss$o_fp99 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp99 #define sal_pss$o_fp100 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp100 #define sal_pss$o_fp101 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp101 #define sal_pss$o_fp102 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp102 #define sal_pss$o_fp103 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp103 #define sal_pss$o_fp104 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp104 #define sal_pss$o_fp105 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp105 #define sal_pss$o_fp106 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp106 #define sal_pss$o_fp107 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp107 #define sal_pss$o_fp108 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp108 #define sal_pss$o_fp109 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp109 #define sal_pss$o_fp110 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp110 #define sal_pss$o_fp111 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp111 #define sal_pss$o_fp112 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp112 #define sal_pss$o_fp113 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp113 #define sal_pss$o_fp114 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp114 #define sal_pss$o_fp115 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp115 #define sal_pss$o_fp116 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp116 #define sal_pss$o_fp117 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp117 #define sal_pss$o_fp118 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp118 #define sal_pss$o_fp119 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp119 #define sal_pss$o_fp120 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp120 #define sal_pss$o_fp121 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp121 #define sal_pss$o_fp122 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp122 #define sal_pss$o_fp123 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp123 #define sal_pss$o_fp124 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp124 #define sal_pss$o_fp125 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp125 #define sal_pss$o_fp126 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp126 #define sal_pss$o_fp127 sal_pss$r_fp_regs_overlay.sal_pss$r_fp_regs_fields.sal_pss$o_fp127 #endif /* #if !defined(__VAXC) */ #define SAL_PSS$FRAME_SIZE 5256 /*++ */ /* SAL Processor Device Error Info Section - Module Structure */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.3, pp. B-5 - B-6 */ /* */ /* (PMS - Processor Module Structure) */ /*-- */ #define SAL_PMS$M_CHECK_VALID 0x1 #define SAL_PMS$M_TARGET_ID_VALID 0x2 #define SAL_PMS$M_REQ_ID_VALID 0x4 #define SAL_PMS$M_RESP_ID_VALID 0x8 #define SAL_PMS$M_PRECISE_IP_VALID 0x10 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_pms { #pragma __nomember_alignment __union { unsigned __int64 sal_pms$q_valid; __struct { unsigned sal_pms$v_check_valid : 1; unsigned sal_pms$v_target_id_valid : 1; unsigned sal_pms$v_req_id_valid : 1; unsigned sal_pms$v_resp_id_valid : 1; unsigned sal_pms$v_precise_ip_valid : 1; unsigned sal_pms$v_reserved_1 : 32; unsigned sal_pms$v_reserved_2 : 27; } sal_pms$r_valid_fields; } sal_pms$r_valid_overlay; unsigned __int64 sal_pms$q_check; unsigned __int64 sal_pms$q_target_id; unsigned __int64 sal_pms$q_req_id; unsigned __int64 sal_pms$q_resp_id; unsigned __int64 sal_pms$q_precise_ip; } SAL_PMS; #if !defined(__VAXC) #define sal_pms$q_valid sal_pms$r_valid_overlay.sal_pms$q_valid #define sal_pms$v_check_valid sal_pms$r_valid_overlay.sal_pms$r_valid_fields.sal_pms$v_check_valid #define sal_pms$v_target_id_valid sal_pms$r_valid_overlay.sal_pms$r_valid_fields.sal_pms$v_target_id_valid #define sal_pms$v_req_id_valid sal_pms$r_valid_overlay.sal_pms$r_valid_fields.sal_pms$v_req_id_valid #define sal_pms$v_resp_id_valid sal_pms$r_valid_overlay.sal_pms$r_valid_fields.sal_pms$v_resp_id_valid #define sal_pms$v_precise_ip_valid sal_pms$r_valid_overlay.sal_pms$r_valid_fields.sal_pms$v_precise_ip_valid #endif /* #if !defined(__VAXC) */ #define SAL_PMS$FRAME_SIZE 48 /*++ */ /* SAL Platform Memory Device Error Info Section - Header Structure */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.4.1, pp. B-6 - B-7 */ /* */ /* (SMS - System Memory Section) */ /*-- */ #define SAL_SMS$M_ERR_STS_VALID 0x1 #define SAL_SMS$M_PHYS_ADDR_VALID 0x2 #define SAL_SMS$M_PHYS_ADDR_MASK 0x4 #define SAL_SMS$M_NODE_VALID 0x8 #define SAL_SMS$M_CARD_VALID 0x10 #define SAL_SMS$M_MOD_VALID 0x20 #define SAL_SMS$M_BANK_VALID 0x40 #define SAL_SMS$M_DEV_VALID 0x80 #define SAL_SMS$M_ROW_VALID 0x100 #define SAL_SMS$M_COL_VALID 0x200 #define SAL_SMS$M_BIT_POS_VALID 0x400 #define SAL_SMS$M_REQ_ID_VALID 0x800 #define SAL_SMS$M_RESP_ID_VALID 0x1000 #define SAL_SMS$M_TARGET_VALID 0x2000 #define SAL_SMS$M_BUS_DATA_VALID 0x4000 #define SAL_SMS$M_OEM_ID_VALID 0x8000 #define SAL_SMS$M_OEM_DATA_VALID 0x10000 #define SAL_SMS$M_ADDR 0x10000 #define SAL_SMS$M_CONTROL 0x20000 #define SAL_SMS$M_DATA 0x40000 #define SAL_SMS$M_RESP 0x80000 #define SAL_SMS$M_REQ 0x100000 #define SAL_SMS$M_FIRST_ERR 0x200000 #define SAL_SMS$M_OVERFLOW 0x400000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_sms { #pragma __nomember_alignment SAL_SHD sal_sms$r_sal_shd; __union { unsigned __int64 sal_sms$q_valid; __struct { unsigned sal_sms$v_err_sts_valid : 1; unsigned sal_sms$v_phys_addr_valid : 1; unsigned sal_sms$v_phys_addr_mask : 1; unsigned sal_sms$v_node_valid : 1; unsigned sal_sms$v_card_valid : 1; unsigned sal_sms$v_mod_valid : 1; unsigned sal_sms$v_bank_valid : 1; unsigned sal_sms$v_dev_valid : 1; unsigned sal_sms$v_row_valid : 1; unsigned sal_sms$v_col_valid : 1; unsigned sal_sms$v_bit_pos_valid : 1; unsigned sal_sms$v_req_id_valid : 1; unsigned sal_sms$v_resp_id_valid : 1; unsigned sal_sms$v_target_valid : 1; unsigned sal_sms$v_bus_data_valid : 1; unsigned sal_sms$v_oem_id_valid : 1; unsigned sal_sms$v_oem_data_valid : 1; unsigned sal_sms$v_reserved_1 : 32; unsigned sal_sms$v_reserved_2 : 15; } sal_sms$r_valid_fields; } sal_sms$r_valid_overlay; __union { unsigned __int64 sal_sms$q_err_sts; __struct { unsigned char sal_sms$b_reserved; unsigned char sal_sms$b_encoded_err_type; unsigned sal_sms$v_addr : 1; unsigned sal_sms$v_control : 1; unsigned sal_sms$v_data : 1; unsigned sal_sms$v_resp : 1; unsigned sal_sms$v_req : 1; unsigned sal_sms$v_first_err : 1; unsigned sal_sms$v_overflow : 1; unsigned sal_sms$v_reserved_1_1 : 32; unsigned sal_sms$v_reserved_1_2 : 9; } sal_sms$r_err_sts_fields; } sal_sms$r_err_sts_overlay; unsigned __int64 sal_sms$q_phys_addr; unsigned __int64 sal_sms$q_phys_addr_mask; unsigned short int sal_sms$w_node; unsigned short int sal_sms$w_card; unsigned short int sal_sms$w_mod; unsigned short int sal_sms$w_bank; unsigned short int sal_sms$w_dev; unsigned short int sal_sms$w_row; unsigned short int sal_sms$w_col; unsigned short int sal_sms$w_bit_pos; unsigned __int64 sal_sms$q_req_id; unsigned __int64 sal_sms$q_resp_id; unsigned __int64 sal_sms$q_target_id; unsigned __int64 sal_sms$q_bus_data; __union { unsigned int sal_sms$o_oem_id [4]; __struct { unsigned __int64 sal_sms$q_oem_id_l; unsigned __int64 sal_sms$q_oem_id_h; } sal_sms$r_oem_id_fields; } sal_sms$r_oem_id_overlay; } SAL_SMS; #if !defined(__VAXC) #define sal_sms$v_err_sts_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_err_sts_valid #define sal_sms$v_phys_addr_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_phys_addr_valid #define sal_sms$v_phys_addr_mask sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_phys_addr_mask #define sal_sms$v_node_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_node_valid #define sal_sms$v_card_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_card_valid #define sal_sms$v_mod_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_mod_valid #define sal_sms$v_bank_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_bank_valid #define sal_sms$v_dev_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_dev_valid #define sal_sms$v_row_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_row_valid #define sal_sms$v_col_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_col_valid #define sal_sms$v_bit_pos_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_bit_pos_valid #define sal_sms$v_req_id_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_req_id_valid #define sal_sms$v_resp_id_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_resp_id_valid #define sal_sms$v_target_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_target_valid #define sal_sms$v_bus_data_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_bus_data_valid #define sal_sms$v_oem_id_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_oem_id_valid #define sal_sms$v_oem_data_valid sal_sms$r_valid_overlay.sal_sms$r_valid_fields.sal_sms$v_oem_data_valid #define sal_sms$q_err_sts sal_sms$r_err_sts_overlay.sal_sms$q_err_sts #define sal_sms$b_encoded_err_type sal_sms$r_err_sts_overlay.sal_sms$r_err_sts_fields.sal_sms$b_encoded_err_type #define sal_sms$v_addr sal_sms$r_err_sts_overlay.sal_sms$r_err_sts_fields.sal_sms$v_addr #define sal_sms$v_control sal_sms$r_err_sts_overlay.sal_sms$r_err_sts_fields.sal_sms$v_control #define sal_sms$v_data sal_sms$r_err_sts_overlay.sal_sms$r_err_sts_fields.sal_sms$v_data #define sal_sms$v_resp sal_sms$r_err_sts_overlay.sal_sms$r_err_sts_fields.sal_sms$v_resp #define sal_sms$v_req sal_sms$r_err_sts_overlay.sal_sms$r_err_sts_fields.sal_sms$v_req #define sal_sms$v_first_err sal_sms$r_err_sts_overlay.sal_sms$r_err_sts_fields.sal_sms$v_first_err #define sal_sms$v_overflow sal_sms$r_err_sts_overlay.sal_sms$r_err_sts_fields.sal_sms$v_overflow #define sal_sms$o_oem_id sal_sms$r_oem_id_overlay.sal_sms$o_oem_id #define sal_sms$q_oem_id_l sal_sms$r_oem_id_overlay.sal_sms$r_oem_id_fields.sal_sms$q_oem_id_l #define sal_sms$q_oem_id_h sal_sms$r_oem_id_overlay.sal_sms$r_oem_id_fields.sal_sms$q_oem_id_h #endif /* #if !defined(__VAXC) */ #define SAL_SMS$FRAME_SIZE 120 /*++ */ /* SAL Platform PCI Bus Error Info Section - Header Structure */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.4.2, pp. B-8 - B-9 */ /* */ /* (SPCIBS - System PCI Bus Section) */ /*-- */ #define SAL_SPCIBS$M_ERR_STS_VALID 0x1 #define SAL_SPCIBS$M_ERR_TYPE_VALID 0x2 #define SAL_SPCIBS$M_ID_VALID 0x4 #define SAL_SPCIBS$M_ADDR_VALID 0x8 #define SAL_SPCIBS$M_DATA_VALID 0x10 #define SAL_SPCIBS$M_CMD_VALID 0x20 #define SAL_SPCIBS$M_REQ_ID_VALID 0x40 #define SAL_SPCIBS$M_COMPL_ID_VALID 0x80 #define SAL_SPCIBS$M_TARGET_ID_VALID 0x100 #define SAL_SPCIBS$M_OEM_ID_VALID 0x200 #define SAL_SPCIBS$M_OEM_DATA_VALID 0x400 #define SAL_SPCIBS$M_ADDR 0x10000 #define SAL_SPCIBS$M_CONTROL 0x20000 #define SAL_SPCIBS$M_DATA 0x40000 #define SAL_SPCIBS$M_RESP 0x80000 #define SAL_SPCIBS$M_REQ 0x100000 #define SAL_SPCIBS$M_FIRST_ERR 0x200000 #define SAL_SPCIBS$M_OVERFLOW 0x400000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_spcibs { #pragma __nomember_alignment SAL_SHD sal_spcibs$r_sal_shd; __union { unsigned __int64 sal_spcibs$q_valid; __struct { unsigned sal_spcibs$v_err_sts_valid : 1; unsigned sal_spcibs$v_err_type_valid : 1; unsigned sal_spcibs$v_id_valid : 1; unsigned sal_spcibs$v_addr_valid : 1; unsigned sal_spcibs$v_data_valid : 1; unsigned sal_spcibs$v_cmd_valid : 1; unsigned sal_spcibs$v_req_id_valid : 1; unsigned sal_spcibs$v_compl_id_valid : 1; unsigned sal_spcibs$v_target_id_valid : 1; unsigned sal_spcibs$v_oem_id_valid : 1; unsigned sal_spcibs$v_oem_data_valid : 1; unsigned sal_spcibs$v_reserved_1 : 32; unsigned sal_spcibs$v_reserved_2 : 21; } sal_spcibs$r_valid_fields; } sal_spcibs$r_valid_overlay; __union { unsigned __int64 sal_spcibs$q_err_sts; __struct { unsigned char sal_spcibs$b_reserved; unsigned char sal_spcibs$b_encoded_err_type; unsigned sal_spcibs$v_addr : 1; unsigned sal_spcibs$v_control : 1; unsigned sal_spcibs$v_data : 1; unsigned sal_spcibs$v_resp : 1; unsigned sal_spcibs$v_req : 1; unsigned sal_spcibs$v_first_err : 1; unsigned sal_spcibs$v_overflow : 1; unsigned sal_spcibs$v_reserved_1_1 : 32; unsigned sal_spcibs$v_reserved_1_2 : 9; } sal_spcibs$r_err_sts_fields; } sal_spcibs$r_err_sts_overlay; unsigned short int sal_spcibs$w_err_type; __union { unsigned short int sal_spcibs$w_id; __struct { unsigned char sal_spcibs$b_bus_num; unsigned char sal_spcibs$b_seg_num; } sal_spcibs$r_id_fields; } sal_spcibs$r_id_overlay; unsigned int sal_spcibs$l_reserved_1; unsigned __int64 sal_spcibs$q_addr; unsigned __int64 sal_spcibs$q_data; unsigned __int64 sal_spcibs$q_cmd; unsigned __int64 sal_spcibs$q_req_id; unsigned __int64 sal_spcibs$q_compl_id; unsigned __int64 sal_spcibs$q_target_id; __union { unsigned int sal_spcibs$o_oem_id [4]; __struct { unsigned __int64 sal_spcibs$q_oem_id_l; unsigned __int64 sal_spcibs$q_oem_id_h; } sal_spcibs$r_oem_id_fields; } sal_spcibs$r_oem_id_overlay; } SAL_SPCIBS; #if !defined(__VAXC) #define sal_spcibs$q_valid sal_spcibs$r_valid_overlay.sal_spcibs$q_valid #define sal_spcibs$v_err_sts_valid sal_spcibs$r_valid_overlay.sal_spcibs$r_valid_fields.sal_spcibs$v_err_sts_valid #define sal_spcibs$v_err_type_valid sal_spcibs$r_valid_overlay.sal_spcibs$r_valid_fields.sal_spcibs$v_err_type_valid #define sal_spcibs$v_id_valid sal_spcibs$r_valid_overlay.sal_spcibs$r_valid_fields.sal_spcibs$v_id_valid #define sal_spcibs$v_addr_valid sal_spcibs$r_valid_overlay.sal_spcibs$r_valid_fields.sal_spcibs$v_addr_valid #define sal_spcibs$v_data_valid sal_spcibs$r_valid_overlay.sal_spcibs$r_valid_fields.sal_spcibs$v_data_valid #define sal_spcibs$v_cmd_valid sal_spcibs$r_valid_overlay.sal_spcibs$r_valid_fields.sal_spcibs$v_cmd_valid #define sal_spcibs$v_req_id_valid sal_spcibs$r_valid_overlay.sal_spcibs$r_valid_fields.sal_spcibs$v_req_id_valid #define sal_spcibs$v_compl_id_valid sal_spcibs$r_valid_overlay.sal_spcibs$r_valid_fields.sal_spcibs$v_compl_id_valid #define sal_spcibs$v_target_id_valid sal_spcibs$r_valid_overlay.sal_spcibs$r_valid_fields.sal_spcibs$v_target_id_valid #define sal_spcibs$v_oem_id_valid sal_spcibs$r_valid_overlay.sal_spcibs$r_valid_fields.sal_spcibs$v_oem_id_valid #define sal_spcibs$v_oem_data_valid sal_spcibs$r_valid_overlay.sal_spcibs$r_valid_fields.sal_spcibs$v_oem_data_valid #define sal_spcibs$q_err_sts sal_spcibs$r_err_sts_overlay.sal_spcibs$q_err_sts #define sal_spcibs$b_encoded_err_type sal_spcibs$r_err_sts_overlay.sal_spcibs$r_err_sts_fields.sal_spcibs$b_encoded_err_type #define sal_spcibs$v_addr sal_spcibs$r_err_sts_overlay.sal_spcibs$r_err_sts_fields.sal_spcibs$v_addr #define sal_spcibs$v_control sal_spcibs$r_err_sts_overlay.sal_spcibs$r_err_sts_fields.sal_spcibs$v_control #define sal_spcibs$v_data sal_spcibs$r_err_sts_overlay.sal_spcibs$r_err_sts_fields.sal_spcibs$v_data #define sal_spcibs$v_resp sal_spcibs$r_err_sts_overlay.sal_spcibs$r_err_sts_fields.sal_spcibs$v_resp #define sal_spcibs$v_req sal_spcibs$r_err_sts_overlay.sal_spcibs$r_err_sts_fields.sal_spcibs$v_req #define sal_spcibs$v_first_err sal_spcibs$r_err_sts_overlay.sal_spcibs$r_err_sts_fields.sal_spcibs$v_first_err #define sal_spcibs$v_overflow sal_spcibs$r_err_sts_overlay.sal_spcibs$r_err_sts_fields.sal_spcibs$v_overflow #define sal_spcibs$w_id sal_spcibs$r_id_overlay.sal_spcibs$w_id #define sal_spcibs$b_bus_num sal_spcibs$r_id_overlay.sal_spcibs$r_id_fields.sal_spcibs$b_bus_num #define sal_spcibs$b_seg_num sal_spcibs$r_id_overlay.sal_spcibs$r_id_fields.sal_spcibs$b_seg_num #define sal_spcibs$o_oem_id sal_spcibs$r_oem_id_overlay.sal_spcibs$o_oem_id #define sal_spcibs$q_oem_id_l sal_spcibs$r_oem_id_overlay.sal_spcibs$r_oem_id_fields.sal_spcibs$q_oem_id_l #define sal_spcibs$q_oem_id_h sal_spcibs$r_oem_id_overlay.sal_spcibs$r_oem_id_fields.sal_spcibs$q_oem_id_h #endif /* #if !defined(__VAXC) */ #define SAL_SPCIBS$FRAME_SIZE 112 /*++ */ /* SAL Platform PCI Component Error Info Section - Header Structure */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.4.3, pp. B-9 - B-10 */ /* */ /* (SPCICS - System PCI Component Section) */ /*-- */ #define SAL_SPCICS$M_ERR_STS_VALID 0x1 #define SAL_SPCICS$M_DATA_VALID 0x2 #define SAL_SPCICS$M_MEM_NUM_VALID 0x4 #define SAL_SPCICS$M_IO_NUM_VALID 0x8 #define SAL_SPCICS$M_REGS_DATA_PAIR_VALID 0x10 #define SAL_SPCICS$M_OEM_DATA_VALID 0x20 #define SAL_SPCICS$M_ADDR 0x10000 #define SAL_SPCICS$M_CONTROL 0x20000 #define SAL_SPCICS$M_DATA 0x40000 #define SAL_SPCICS$M_RESP 0x80000 #define SAL_SPCICS$M_REQ 0x100000 #define SAL_SPCICS$M_FIRST_ERR 0x200000 #define SAL_SPCICS$M_OVERFLOW 0x400000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_spcics { #pragma __nomember_alignment SAL_SHD sal_spcics$r_sal_shd; __union { unsigned __int64 sal_spcics$q_valid; __struct { unsigned sal_spcics$v_err_sts_valid : 1; unsigned sal_spcics$v_data_valid : 1; unsigned sal_spcics$v_mem_num_valid : 1; unsigned sal_spcics$v_io_num_valid : 1; unsigned sal_spcics$v_regs_data_pair_valid : 1; unsigned sal_spcics$v_oem_data_valid : 1; unsigned sal_spcics$v_reserved_1 : 32; unsigned sal_spcics$v_reserved_2 : 26; } sal_spcics$r_valid_fields; } sal_spcics$r_valid_overlay; __union { unsigned __int64 sal_spcics$q_err_sts; __struct { unsigned char sal_spcics$b_reserved; unsigned char sal_spcics$b_encoded_err_type; unsigned sal_spcics$v_addr : 1; unsigned sal_spcics$v_control : 1; unsigned sal_spcics$v_data : 1; unsigned sal_spcics$v_resp : 1; unsigned sal_spcics$v_req : 1; unsigned sal_spcics$v_first_err : 1; unsigned sal_spcics$v_overflow : 1; unsigned sal_spcics$v_reserved_1_1 : 32; unsigned sal_spcics$v_reserved_1_2 : 9; } sal_spcics$r_err_sts_fields; } sal_spcics$r_err_sts_overlay; __union { unsigned int sal_spcics$o_pci_comp [4]; __struct { unsigned short int sal_spcics$w_vendor_id; unsigned short int sal_spcics$w_dev_id; unsigned short int sal_spcics$w_class_code [3]; unsigned char sal_spcics$b_func_num; unsigned char sal_spcics$b_dev_num; unsigned char sal_spcics$b_bus_num; unsigned char sal_spcics$b_seg_num; unsigned char sal_spcics$b_reserved_1 [5]; } sal_spcics$r_pci_comp_fields; } sal_spcics$r_pci_comp_overlay; unsigned int sal_spcics$l_mem_num; unsigned int sal_spcics$l_io_num; char sal_spcics$b_fill_0_ [5]; } SAL_SPCICS; #if !defined(__VAXC) #define sal_spcics$q_valid sal_spcics$r_valid_overlay.sal_spcics$q_valid #define sal_spcics$v_err_sts_valid sal_spcics$r_valid_overlay.sal_spcics$r_valid_fields.sal_spcics$v_err_sts_valid #define sal_spcics$v_data_valid sal_spcics$r_valid_overlay.sal_spcics$r_valid_fields.sal_spcics$v_data_valid #define sal_spcics$v_mem_num_valid sal_spcics$r_valid_overlay.sal_spcics$r_valid_fields.sal_spcics$v_mem_num_valid #define sal_spcics$v_io_num_valid sal_spcics$r_valid_overlay.sal_spcics$r_valid_fields.sal_spcics$v_io_num_valid #define sal_spcics$v_regs_data_pair_valid sal_spcics$r_valid_overlay.sal_spcics$r_valid_fields.sal_spcics$v_regs_data_pair_valid #define sal_spcics$v_oem_data_valid sal_spcics$r_valid_overlay.sal_spcics$r_valid_fields.sal_spcics$v_oem_data_valid #define sal_spcics$q_err_sts sal_spcics$r_err_sts_overlay.sal_spcics$q_err_sts #define sal_spcics$b_encoded_err_type sal_spcics$r_err_sts_overlay.sal_spcics$r_err_sts_fields.sal_spcics$b_encoded_err_type #define sal_spcics$v_addr sal_spcics$r_err_sts_overlay.sal_spcics$r_err_sts_fields.sal_spcics$v_addr #define sal_spcics$v_control sal_spcics$r_err_sts_overlay.sal_spcics$r_err_sts_fields.sal_spcics$v_control #define sal_spcics$v_data sal_spcics$r_err_sts_overlay.sal_spcics$r_err_sts_fields.sal_spcics$v_data #define sal_spcics$v_resp sal_spcics$r_err_sts_overlay.sal_spcics$r_err_sts_fields.sal_spcics$v_resp #define sal_spcics$v_req sal_spcics$r_err_sts_overlay.sal_spcics$r_err_sts_fields.sal_spcics$v_req #define sal_spcics$v_first_err sal_spcics$r_err_sts_overlay.sal_spcics$r_err_sts_fields.sal_spcics$v_first_err #define sal_spcics$v_overflow sal_spcics$r_err_sts_overlay.sal_spcics$r_err_sts_fields.sal_spcics$v_overflow #define sal_spcics$o_pci_comp sal_spcics$r_pci_comp_overlay.sal_spcics$o_pci_comp #define sal_spcics$w_vendor_id sal_spcics$r_pci_comp_overlay.sal_spcics$r_pci_comp_fields.sal_spcics$w_vendor_id #define sal_spcics$w_dev_id sal_spcics$r_pci_comp_overlay.sal_spcics$r_pci_comp_fields.sal_spcics$w_dev_id #define sal_spcics$w_class_code sal_spcics$r_pci_comp_overlay.sal_spcics$r_pci_comp_fields.sal_spcics$w_class_code #define sal_spcics$b_func_num sal_spcics$r_pci_comp_overlay.sal_spcics$r_pci_comp_fields.sal_spcics$b_func_num #define sal_spcics$b_dev_num sal_spcics$r_pci_comp_overlay.sal_spcics$r_pci_comp_fields.sal_spcics$b_dev_num #define sal_spcics$b_bus_num sal_spcics$r_pci_comp_overlay.sal_spcics$r_pci_comp_fields.sal_spcics$b_bus_num #define sal_spcics$b_seg_num sal_spcics$r_pci_comp_overlay.sal_spcics$r_pci_comp_fields.sal_spcics$b_seg_num #endif /* #if !defined(__VAXC) */ #define SAL_SPCICS$FRAME_SIZE 72 /*++ */ /* SAL Platform SEL Device Error Info Section */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.4.4, pp. B-10 - B-11 */ /* */ /* (SSELS - System SEL Section) */ /*-- */ #define SAL_SSELS$M_REC_ID_VALID 0x1 #define SAL_SSELS$M_REC_TYPE_VALID 0x2 #define SAL_SSELS$M_TIMESTAMP_VALID 0x4 #define SAL_SSELS$M_GEN_TYPE_VALID 0x8 #define SAL_SSELS$M_EVM_REV_VALID 0x10 #define SAL_SSELS$M_SENS_TYPE_VALID 0x20 #define SAL_SSELS$M_SENS_NUM_VALID 0x40 #define SAL_SSELS$M_EVENT_DIR_TYPE_VALID 0x80 #define SAL_SSELS$M_EVENT_DATA1_VALID 0x100 #define SAL_SSELS$M_EVENT_DATA2_VALID 0x200 #define SAL_SSELS$M_EVENT_DATA3_VALID 0x400 #define SAL_SSELS$M_SYS_SW_ID_VALID 0x1 #define SAL_SSELS$M_DEASSERTION 0x80 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_ssels { #pragma __nomember_alignment SAL_SHD sal_ssels$r_sal_shd; __union { unsigned __int64 sal_ssels$q_valid; __struct { unsigned sal_ssels$v_rec_id_valid : 1; unsigned sal_ssels$v_rec_type_valid : 1; unsigned sal_ssels$v_timestamp_valid : 1; unsigned sal_ssels$v_gen_type_valid : 1; unsigned sal_ssels$v_evm_rev_valid : 1; unsigned sal_ssels$v_sens_type_valid : 1; unsigned sal_ssels$v_sens_num_valid : 1; unsigned sal_ssels$v_event_dir_type_valid : 1; unsigned sal_ssels$v_event_data1_valid : 1; unsigned sal_ssels$v_event_data2_valid : 1; unsigned sal_ssels$v_event_data3_valid : 1; unsigned sal_ssels$v_reserved_1 : 32; unsigned sal_ssels$v_reserved_2 : 21; } sal_ssels$r_valid_fields; } sal_ssels$r_valid_overlay; unsigned short int sal_ssels$w_rec_id; unsigned char sal_ssels$b_rec_type; unsigned int sal_ssels$l_timestamp; __union { unsigned short int sal_ssels$w_gen_id; __struct { __union { unsigned char sal_ssels$b_gen_id_l; __struct { unsigned sal_ssels$v_sys_sw_id_valid : 1; unsigned sal_ssels$v_sys_sw_id : 7; } sal_ssels$r_gen_id_l_fields; } sal_ssels$r_gen_id_l_overlay; __union { unsigned char sal_ssels$b_gen_id_h; __struct { unsigned sal_ssels$v_ipmb_dev_lun : 2; unsigned sal_ssels$v_reserved_1 : 6; } sal_ssels$r_gen_id_h_fields; } sal_ssels$r_gen_id_h_overlay; } sal_ssels$r_gen_id_fields; } sal_ssels$r_gen_id_overlay; unsigned char sal_ssels$b_evm_rev; unsigned char sal_ssels$b_sens_type; unsigned char sal_ssels$b_sens_num; __union { unsigned char sal_ssels$b_event_dir_type; __struct { unsigned sal_ssels$v_event_type_code : 7; unsigned sal_ssels$v_deassertion : 1; } sal_ssels$r_event_dir_type_fields; } sal_ssels$r_event_dir_type_overlay; unsigned char sal_ssels$b_event_data1; unsigned char sal_ssels$b_event_data2; unsigned char sal_ssels$b_event_data3; } SAL_SSELS; #if !defined(__VAXC) #define sal_ssels$q_valid sal_ssels$r_valid_overlay.sal_ssels$q_valid #define sal_ssels$v_rec_id_valid sal_ssels$r_valid_overlay.sal_ssels$r_valid_fields.sal_ssels$v_rec_id_valid #define sal_ssels$v_rec_type_valid sal_ssels$r_valid_overlay.sal_ssels$r_valid_fields.sal_ssels$v_rec_type_valid #define sal_ssels$v_timestamp_valid sal_ssels$r_valid_overlay.sal_ssels$r_valid_fields.sal_ssels$v_timestamp_valid #define sal_ssels$v_gen_type_valid sal_ssels$r_valid_overlay.sal_ssels$r_valid_fields.sal_ssels$v_gen_type_valid #define sal_ssels$v_evm_rev_valid sal_ssels$r_valid_overlay.sal_ssels$r_valid_fields.sal_ssels$v_evm_rev_valid #define sal_ssels$v_sens_type_valid sal_ssels$r_valid_overlay.sal_ssels$r_valid_fields.sal_ssels$v_sens_type_valid #define sal_ssels$v_sens_num_valid sal_ssels$r_valid_overlay.sal_ssels$r_valid_fields.sal_ssels$v_sens_num_valid #define sal_ssels$v_event_dir_type_valid sal_ssels$r_valid_overlay.sal_ssels$r_valid_fields.sal_ssels$v_event_dir_type_valid #define sal_ssels$v_event_data1_valid sal_ssels$r_valid_overlay.sal_ssels$r_valid_fields.sal_ssels$v_event_data1_valid #define sal_ssels$v_event_data2_valid sal_ssels$r_valid_overlay.sal_ssels$r_valid_fields.sal_ssels$v_event_data2_valid #define sal_ssels$v_event_data3_valid sal_ssels$r_valid_overlay.sal_ssels$r_valid_fields.sal_ssels$v_event_data3_valid #define sal_ssels$w_gen_id sal_ssels$r_gen_id_overlay.sal_ssels$w_gen_id #define sal_ssels$b_gen_id_l sal_ssels$r_gen_id_overlay.sal_ssels$r_gen_id_fields.sal_ssels$r_gen_id_l_overlay.sal_ssels$b_gen_id_l #define sal_ssels$v_sys_sw_id_valid sal_ssels$r_gen_id_overlay.sal_ssels$r_gen_id_fields.sal_ssels$r_gen_id_l_overlay.sal_ssels$r_g\ en_id_l_fields.sal_ssels$v_sys_sw_id_valid #define sal_ssels$v_sys_sw_id sal_ssels$r_gen_id_overlay.sal_ssels$r_gen_id_fields.sal_ssels$r_gen_id_l_overlay.sal_ssels$r_gen_id_\ l_fields.sal_ssels$v_sys_sw_id #define sal_ssels$b_gen_id_h sal_ssels$r_gen_id_overlay.sal_ssels$r_gen_id_fields.sal_ssels$r_gen_id_h_overlay.sal_ssels$b_gen_id_h #define sal_ssels$v_ipmb_dev_lun sal_ssels$r_gen_id_overlay.sal_ssels$r_gen_id_fields.sal_ssels$r_gen_id_h_overlay.sal_ssels$r_gen_\ id_h_fields.sal_ssels$v_ipmb_dev_lun #define sal_ssels$b_event_dir_type sal_ssels$r_event_dir_type_overlay.sal_ssels$b_event_dir_type #define sal_ssels$v_event_type_code sal_ssels$r_event_dir_type_overlay.sal_ssels$r_event_dir_type_fields.sal_ssels$v_event_type_code #define sal_ssels$v_deassertion sal_ssels$r_event_dir_type_overlay.sal_ssels$r_event_dir_type_fields.sal_ssels$v_deassertion #endif /* #if !defined(__VAXC) */ #define SAL_SSELS$FRAME_SIZE 48 /*++ */ /* SAL SMBIOS Device Error Info Section - Header Structure */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.4.5, pp. B-11 */ /* */ /* (SSMBIOSS - System SMBIOS Section) */ /*-- */ #define SAL_SSMBIOSS$M_EVENT_TYPE_VALID 0x1 #define SAL_SSMBIOSS$M_LEN_VALID 0x2 #define SAL_SSMBIOSS$M_TIMESTAMP_VALID 0x4 #define SAL_SSMBIOSS$M_DATA_VALID 0x8 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_ssmbioss { #pragma __nomember_alignment SAL_SHD sal_ssmbioss$r_sal_shd; __union { unsigned __int64 sal_ssmbioss$q_valid; __struct { unsigned sal_ssmbioss$v_event_type_valid : 1; unsigned sal_ssmbioss$v_len_valid : 1; unsigned sal_ssmbioss$v_timestamp_valid : 1; unsigned sal_ssmbioss$v_data_valid : 1; unsigned sal_ssmbioss$v_reserved_1 : 32; unsigned sal_ssmbioss$v_reserved_2 : 28; } sal_ssmbioss$r_valid_fields; } sal_ssmbioss$r_valid_overlay; unsigned char sal_ssmbioss$b_event_type; unsigned char sal_ssmbioss$b_len; unsigned char sal_ssmbioss$b_timestamp [6]; } SAL_SSMBIOSS; #if !defined(__VAXC) #define sal_ssmbioss$q_valid sal_ssmbioss$r_valid_overlay.sal_ssmbioss$q_valid #define sal_ssmbioss$v_event_type_valid sal_ssmbioss$r_valid_overlay.sal_ssmbioss$r_valid_fields.sal_ssmbioss$v_event_type_valid #define sal_ssmbioss$v_len_valid sal_ssmbioss$r_valid_overlay.sal_ssmbioss$r_valid_fields.sal_ssmbioss$v_len_valid #define sal_ssmbioss$v_timestamp_valid sal_ssmbioss$r_valid_overlay.sal_ssmbioss$r_valid_fields.sal_ssmbioss$v_timestamp_valid #define sal_ssmbioss$v_data_valid sal_ssmbioss$r_valid_overlay.sal_ssmbioss$r_valid_fields.sal_ssmbioss$v_data_valid #endif /* #if !defined(__VAXC) */ #define SAL_SSMBIOSS$FRAME_SIZE 40 /*++ */ /* SAL Specific Error Info Section - Header Structure */ /* */ /* SAL 3.0 */ /* "Itanium Processor Family System Abstraction Layer Specification, November 2002" */ /* Section B.2.4.6, pp. B-11 - B-12 */ /* */ /* (SOEMS - System OEM Section) */ /*-- */ #define SAL_SOEMS$M_ERR_STS_VALID 0x1 #define SAL_SOEMS$M_REQ_ID_VALID 0x2 #define SAL_SOEMS$M_RESP_ID_VALID 0x4 #define SAL_SOEMS$M_TARGET_ID_VALID 0x8 #define SAL_SOEMS$M_SYS_SPEC_DATA_VALID 0x10 #define SAL_SOEMS$M_OEM_ID_VALID 0x20 #define SAL_SOEMS$M_OEM_DATA_VALID 0x40 #define SAL_SOEMS$M_OEM_DEV_PATH_VALID 0x80 #define SAL_SOEMS$M_ADDR 0x10000 #define SAL_SOEMS$M_CONTROL 0x20000 #define SAL_SOEMS$M_DATA 0x40000 #define SAL_SOEMS$M_RESP 0x80000 #define SAL_SOEMS$M_REQ 0x100000 #define SAL_SOEMS$M_FIRST_ERR 0x200000 #define SAL_SOEMS$M_OVERFLOW 0x400000 #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _sal_soems { #pragma __nomember_alignment SAL_SHD sal_soems$r_sal_shd; __union { unsigned __int64 sal_soems$q_valid; __struct { unsigned sal_soems$v_err_sts_valid : 1; unsigned sal_soems$v_req_id_valid : 1; unsigned sal_soems$v_resp_id_valid : 1; unsigned sal_soems$v_target_id_valid : 1; unsigned sal_soems$v_sys_spec_data_valid : 1; unsigned sal_soems$v_oem_id_valid : 1; unsigned sal_soems$v_oem_data_valid : 1; unsigned sal_soems$v_oem_dev_path_valid : 1; unsigned sal_soems$v_reserved_1 : 32; unsigned sal_soems$v_reserved_2 : 24; } sal_soems$r_valid_fields; } sal_soems$r_valid_overlay; __union { unsigned __int64 sal_soems$q_err_sts; __struct { unsigned char sal_soems$b_reserved; unsigned char sal_soems$b_encoded_err_type; unsigned sal_soems$v_addr : 1; unsigned sal_soems$v_control : 1; unsigned sal_soems$v_data : 1; unsigned sal_soems$v_resp : 1; unsigned sal_soems$v_req : 1; unsigned sal_soems$v_first_err : 1; unsigned sal_soems$v_overflow : 1; unsigned sal_soems$v_reserved_1_1 : 32; unsigned sal_soems$v_reserved_1_2 : 9; } sal_soems$r_err_sts_fields; } sal_soems$r_err_sts_overlay; unsigned __int64 sal_soems$q_req_id; unsigned __int64 sal_soems$q_resp_id; unsigned __int64 sal_soems$q_target_id; unsigned __int64 sal_soems$q_bus_spec_data; __union { unsigned int sal_soems$o_oem_comp_id [4]; __struct { unsigned __int64 sal_soems$q_oem_comp_id_l; unsigned __int64 sal_soems$q_oem_comp_id_h; } sal_soems$r_oem_comp_id_fields; } sal_soems$r_oem_comp_id_overlay; } SAL_SOEMS; #if !defined(__VAXC) #define sal_soems$q_valid sal_soems$r_valid_overlay.sal_soems$q_valid #define sal_soems$v_err_sts_valid sal_soems$r_valid_overlay.sal_soems$r_valid_fields.sal_soems$v_err_sts_valid #define sal_soems$v_req_id_valid sal_soems$r_valid_overlay.sal_soems$r_valid_fields.sal_soems$v_req_id_valid #define sal_soems$v_resp_id_valid sal_soems$r_valid_overlay.sal_soems$r_valid_fields.sal_soems$v_resp_id_valid #define sal_soems$v_target_id_valid sal_soems$r_valid_overlay.sal_soems$r_valid_fields.sal_soems$v_target_id_valid #define sal_soems$v_sys_spec_data_valid sal_soems$r_valid_overlay.sal_soems$r_valid_fields.sal_soems$v_sys_spec_data_valid #define sal_soems$v_oem_id_valid sal_soems$r_valid_overlay.sal_soems$r_valid_fields.sal_soems$v_oem_id_valid #define sal_soems$v_oem_data_valid sal_soems$r_valid_overlay.sal_soems$r_valid_fields.sal_soems$v_oem_data_valid #define sal_soems$v_oem_dev_path_valid sal_soems$r_valid_overlay.sal_soems$r_valid_fields.sal_soems$v_oem_dev_path_valid #define sal_soems$q_err_sts sal_soems$r_err_sts_overlay.sal_soems$q_err_sts #define sal_soems$b_encoded_err_type sal_soems$r_err_sts_overlay.sal_soems$r_err_sts_fields.sal_soems$b_encoded_err_type #define sal_soems$v_addr sal_soems$r_err_sts_overlay.sal_soems$r_err_sts_fields.sal_soems$v_addr #define sal_soems$v_control sal_soems$r_err_sts_overlay.sal_soems$r_err_sts_fields.sal_soems$v_control #define sal_soems$v_data sal_soems$r_err_sts_overlay.sal_soems$r_err_sts_fields.sal_soems$v_data #define sal_soems$v_resp sal_soems$r_err_sts_overlay.sal_soems$r_err_sts_fields.sal_soems$v_resp #define sal_soems$v_req sal_soems$r_err_sts_overlay.sal_soems$r_err_sts_fields.sal_soems$v_req #define sal_soems$v_first_err sal_soems$r_err_sts_overlay.sal_soems$r_err_sts_fields.sal_soems$v_first_err #define sal_soems$v_overflow sal_soems$r_err_sts_overlay.sal_soems$r_err_sts_fields.sal_soems$v_overflow #define sal_soems$o_oem_comp_id sal_soems$r_oem_comp_id_overlay.sal_soems$o_oem_comp_id #define sal_soems$q_oem_comp_id_l sal_soems$r_oem_comp_id_overlay.sal_soems$r_oem_comp_id_fields.sal_soems$q_oem_comp_id_l #define sal_soems$q_oem_comp_id_h sal_soems$r_oem_comp_id_overlay.sal_soems$r_oem_comp_id_fields.sal_soems$q_oem_comp_id_h #endif /* #if !defined(__VAXC) */ #define SAL_SOEMS$FRAME_SIZE 88 /*++ */ /* CER_STAT Field */ /*-- */ #define CER_STAT$M_PCER 0x8 #define CER_STAT$M_SCER 0x10 #define CER_STAT$M_PCEL 0x100 #define CER_STAT$M_SCEL 0x1 typedef struct _cer_stat { __union { unsigned int cer_stat$l_cpu_stat; __struct { unsigned cer_stat$v_reserved_1 : 3; /* [2:0] */ unsigned cer_stat$v_pcer : 1; /* [3] */ unsigned cer_stat$v_scer : 1; /* [4] */ unsigned cer_stat$v_reserved_2 : 3; /* [7:5] */ unsigned cer_stat$v_pcel : 1; /* [8] */ unsigned cer_stat$v_reserved_3 : 23; /* [31:9] */ } cer_stat$r_cpu_stat_fields; } cer_stat$r_cpu_stat_overlay; __union { unsigned int cer_stat$l_sys_stat; __struct { unsigned cer_stat$v_scel : 1; /* [32] */ unsigned cer_stat$v_reserved_4 : 31; /* [63:33] */ } cer_stat$r_sys_stat_fields; } cer_stat$r_sys_stat_overlay; } CER_STAT; #if !defined(__VAXC) #define cer_stat$l_cpu_stat cer_stat$r_cpu_stat_overlay.cer_stat$l_cpu_stat #define cer_stat$v_pcer cer_stat$r_cpu_stat_overlay.cer_stat$r_cpu_stat_fields.cer_stat$v_pcer #define cer_stat$v_scer cer_stat$r_cpu_stat_overlay.cer_stat$r_cpu_stat_fields.cer_stat$v_scer #define cer_stat$v_pcel cer_stat$r_cpu_stat_overlay.cer_stat$r_cpu_stat_fields.cer_stat$v_pcel #define cer_stat$l_sys_stat cer_stat$r_sys_stat_overlay.cer_stat$l_sys_stat #define cer_stat$v_scel cer_stat$r_sys_stat_overlay.cer_stat$r_sys_stat_fields.cer_stat$v_scel #endif /* #if !defined(__VAXC) */ #define CER_STAT$K_LENGTH 8 /*++ */ /* Correctable Error Reporting Subpacket */ /*-- */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _cer { #pragma __nomember_alignment unsigned short int cer$w_length; unsigned short int cer$w_class; unsigned short int cer$w_type; unsigned short int cer$w_rev; unsigned __int64 cer$q_cpu_whami; /* Logical CPU number of reporting processor. */ CER_STAT cer$r_cer_stat; /* Correctable error reporting status. */ } CER; #define CER$K_LENGTH 24 #define CER$K_CLASS 9 #define CER$K_TYPE 1 #define CER$K_REV 2 /*++ */ /* Entry Terminator Subpacket */ /*-- */ #if !defined(__NOBASEALIGN_SUPPORT) && !defined(__cplusplus) /* If using pre DECC V4.0 or C++ */ #pragma __nomember_alignment __quadword #else #pragma __nomember_alignment #endif typedef struct _entry_term { #pragma __nomember_alignment unsigned short int entry_term$w_length; unsigned short int entry_term$w_class; unsigned short int entry_term$w_type; unsigned short int entry_term$w_rev; } ENTRY_TERM; #define ENTRY_TERM$K_LENGTH 8 #define ENTRY_TERM$K_CLASS 0 #define ENTRY_TERM$K_TYPE 0 #define ENTRY_TERM$K_REV 1 /*++ */ /* IA64-specific CRD_CONTROL bits. */ /* */ /* Overlay of exe$gl_crd_control.crd_control$w_sys_specific */ /* which is the upper word of exe$gl_crd_control. */ /*-- */ #define CRD_CONTROL_IA64$M_POLLING_TIME 0x7 #define CRD_CONTROL_IA64$M_DISABLE_POLLING 0x8 typedef struct _crd_control_ia64 { unsigned crd_control_ia64$v_polling_time : 3; /* Used for tuning the polling time for corrected errors */ unsigned crd_control_ia64$v_disable_polling : 1; /* Disable polling for corrected errors */ unsigned crd_control_ia64$v_reserved : 4; /* Reserved */ unsigned char crd_control_ia64$b_debug; /* Reserved for debug use. */ } CRD_CONTROL_IA64; #define CRD_CONTROL_IA64$K_LENGTH 2 #pragma __member_alignment __restore #ifdef __INITIAL_POINTER_SIZE /* Defined whenever ptr size pragmas supported */ #pragma __required_pointer_size __restore /* Restore the previously-defined required ptr size */ #endif #ifdef __cplusplus } #endif #pragma __standard #endif /* __IA64_MCHKDEF_LOADED */