///////////////////////////////////////////////////////////////////////////////
//
// FACILITY:
//
//      IPB
//
// ABSTRACT:
//
//      Header file required to use the routines in boo$io_support.c
//      Has all the function prototypes.
//
//  REFERENCE:
//
//      Intel 460GX Chipset System Software Developer's Manual
//      Intel IA-64 Architecture Software Debeloper's Manual, Vol. 2
//
// AUTHOR:
//
//      Tony Camuso
//
// REVISION HISTORY:
//
//  X-10    TLC             Tony Camuso                 09-Aug-2005
//          Add support for PCIe extended config space access.
//
//  X-9     TLC             Tony Camuso                 09-Sep-2004
//          Add BTADP parameter to boo$read and boo$write routines.
//
//  X-8     TLC             Tony Camuso                 17-Apr-2003
//          Change the data type in the address argument of the
//          boo$in/out routines from int to uint64. Signed arithmetic
//          would scuttle the address space test if the MSB of the
//          signed int address were set.
//
//  X-7     CJ              Charles Jaojaroenkul        12-Feb-2003
//          Add an address mask for legacy port I/O base addresses.
//
//  X-6     TLC                 Tony Camuso             04-Feb-2003
//          Compile as 64-bit, require 64-bit for boo$ld*p/boo$st*p
//          routines. Set address bit 63 for boo$read*/boo$write*
//          routines for making physical accesses.
//          Change address parameters in boo$ld*p/boo$st*p routines
//          to pointer-to-void.
//
//  X-5     TLC                 Tony Camuso             29-Jan-2003
//          Add physical load/store routines.
//
//  X-4     TLC                 Tony Camuso             27-Jan-2003
//          Add constant mask for Port-IO/PCI-IO address space.
//
//  X-3	    PJR		Paul Rivera	26-Sep-2002
//      . Include changes made in X-2 checkin by FAK.
//      . Added memory allocation routines
//
//  X-2     TLC                 Tony Camuso             23-Mar-2002
//          . Changed read/write pci_config routines to take PCI_NODE_NUMBER
//            instead of a raw PCI config address. This abstracts the
//            platform-specific implementation of the structure of the PCI
//            config address.
//          . Added int types while awaiting final version of Compaq C
//            IA64 x-compiler.
//          . Added the PCI_NODE_NUMBER declaration. Though this is declared
//            in PCIDEF.H, that header file was created with SDL, which
//            generates macros and pragmas that will gag the gcc compiler.
//            But this too shall pass when we do all our compiles with the
//            Compaq C IA64 x-compiler.
//
//  X-1     TLC                 Tony Camuso             21-Feb-2002
//          Initial entry.
//
///////////////////////////////////////////////////////////////////////////////

#ifndef _BOO$IO_SUPPORT_H_LOADED
#define _BOO$IO_SUPPORT_H_LOADED 1


#include <ints.h>
#include <pcidef.h>
#include <btadpdef.h>

///////////////////////////////////////////////////////////////////////////////
// NODE DATA FUNCTIONS
///////////////////////////////////////////////////////////////////////////////
//
enum {
    BOO$K_DDMA_BASE_PA = 1,
    BOO$K_DDMA_WIN_SIZE,
    BOO$K_DDMA_BASE_BA,
    BOO$K_DIRECT_DMA_SIZE,
    BOO$K_EISA_IO_PORT
};

///////////////////////////////////////////////////////////////////////////////
// IO Address Spaces
///////////////////////////////////////////////////////////////////////////////
//
enum {
    BOO$K_IOPORT = 1,
    BOO$K_IOMEM
};

// Offsets into the IO address space will not be great enough to require more
// than 28 bits. That leaves bits 63:28 for defining the address space in
// either the physical or virtual realm.
//
#define IO_ADDR_SPACE_OFFSET_MASK ((1 << 28) - 1)

// Conventional Port IO and PCI-IO address space is limited to 64 KB of space
// and is partitioned as follows.
//
//      0xFFFF \
//         |    PCI-IO Space
//      0x1000 /
//      0x0FFF \
//         |    Legacy Port IO Space
//      0x0000 /
//
// The following mask will be used by the read/write and in/out routines
// to determine which address space is being reference. Addresses greater
// than this mask value will be referenced as Memory-Mapped IO (MMIO) space.
//
#define IO_SPACE_ADDR_MASK  0x0000FFFF

// When we map I/O port addresses in legacy port I/O memory space, we use the
// following memory mask.
//
#define IO_PORT_MASK 0xFFF

// Legacy PCI and PCIe Extended Config Address flags
//
#define PCI_LEGACY_MAX_OFFSET 0xFF
#define PCI_LEGACY_ADDR  0
#define PCI_EXPRESS_ADDR 1

///////////////////////////////////////////////////////////////////////////////
// NODE DATA ROUTINE
///////////////////////////////////////////////////////////////////////////////
//
extern int boo$node_data (int iFunctionCode, int *piUserBuffer);

///////////////////////////////////////////////////////////////////////////////
// IO ADDRESS SPACE CONVERSION ROUTINES
///////////////////////////////////////////////////////////////////////////////
//
extern uint64 boo$io_va_to_pa( uint64 uqVa, int iIoSpace );
extern uint64 boo$io_pa_to_va( uint64 uqPa, int iIoSpace );

///////////////////////////////////////////////////////////////////////////////
// IO SPACE MAPPING ROUTINES
///////////////////////////////////////////////////////////////////////////////
//
extern uint64 boo$map_io   ( uint64 uqPhysAddr, int iSize );
extern void   boo$unmap_io ( uint64 uqVirtAddr, int iSize );

///////////////////////////////////////////////////////////////////////////////
// PCI MEMORY SPACE ACCESS ROUTINES
///////////////////////////////////////////////////////////////////////////////
//
// The following routines provide access to PCI Memory space and
// i460gx CSR space
//
// There are two prototypes provided for each routine.
//
// #define BOO_NEW_PARAMS - the routines require the BTADP arg
//
// If the user does not #define BOO_NEW_PARAMS, the routines will not require
// the BTADP argument.
//
#ifdef BOO_NEW_PARAMS

extern uint8  boo$readb   ( uint64 uqVirtIoAddr, BTADP* pBtadp );  // Return a byte
extern uint16 boo$readw   ( uint64 uqVirtIoAddr, BTADP* pBtadp );  // Return a word
extern uint32 boo$readl   ( uint64 uqVirtIoAddr, BTADP* pBtadp );  // Return a longword
extern uint64 boo$readq   ( uint64 uqVirtIoAddr, BTADP* pBtadp );  // Return a quadword
//
extern void   boo$writeb  ( uint64 uqVirtIoAddr, uint8  ubData, BTADP* pBtadp );   // Write a byte
extern void   boo$writew  ( uint64 uqVirtIoAddr, uint16 uwData, BTADP* pBtadp );   // Write a word
extern void   boo$writel  ( uint64 uqVirtIoAddr, uint32 ulData, BTADP* pBtadp );   // Write a longword
extern void   boo$writeq  ( uint64 uqVirtIoAddr, uint64 uqData, BTADP* pBtadp );   // Write a quadword

#else

extern uint8  boo$readb   ( uint64 uqVirtIoAddr );  // Return a byte
extern uint16 boo$readw   ( uint64 uqVirtIoAddr );  // Return a word
extern uint32 boo$readl   ( uint64 uqVirtIoAddr );  // Return a longword
extern uint64 boo$readq   ( uint64 uqVirtIoAddr );  // Return a quadword
//
extern void   boo$writeb  ( uint64 uqVirtIoAddr, uint8  ubData );   // Write a byte
extern void   boo$writew  ( uint64 uqVirtIoAddr, uint16 uwData );   // Write a word
extern void   boo$writel  ( uint64 uqVirtIoAddr, uint32 ulData );   // Write a longword
extern void   boo$writeq  ( uint64 uqVirtIoAddr, uint64 uqData );   // Write a quadword

#endif

///////////////////////////////////////////////////////////////////////////////


///////////////////////////////////////////////////////////////////////////////
// PORT IO SPACE ACCESS ROUTINES
///////////////////////////////////////////////////////////////////////////////
//
// NOTE: No need to call boo$map_io(). Just call the routine with the port
//       number. The 64 KB (64 MB swizzled) of port IO space is permanently
//       mapped once for all.
//
// Example: Write 'A' to port 0x3F8
//
//  boo$outb( 0x3f8, 'A' );
//
extern uint8  boo$inb   ( uint64 iIoPort );    // Read a byte from a port
extern uint16 boo$inw   ( uint64 iIoPort );    // Read a word from a port
extern uint32 boo$inl   ( uint64 iIoPort );    // Read a longword from a port
//
extern void   boo$outb  ( uint64 iIoPort, uint8  ubData ); // Write a byte to a port
extern void   boo$outw  ( uint64 iIoPort, uint16 uwData ); // Write a word to a port
extern void   boo$outl  ( uint64 iIoPort, uint32 ulData ); // Write a longword to a port
///////////////////////////////////////////////////////////////////////////////


///////////////////////////////////////////////////////////////////////////////
// PHYSICAL ADDRESS SPACE ACCESS ROUTINES
///////////////////////////////////////////////////////////////////////////////
//
//
#pragma __required_pointer_size __save
#pragma __required_pointer_size 64

extern uint8  boo$ldbp( void*  pubAddr );
extern uint16 boo$ldwp( void* puwAddr );
extern uint32 boo$ldlp( void* pulAddr );
extern uint64 boo$ldqp( void* puqAddr );
//
extern void boo$stbp( void*  pubAddr, uint8  ubData );
extern void boo$stwp( void* puwAddr, uint16 uwData );
extern void boo$stlp( void* pulAddr, uint32 ulData );
extern void boo$stqp( void* puqAddr, uint64 uqData );

#pragma __required_pointer_size __restore

///////////////////////////////////////////////////////////////////////////////
// PCI CONFIG ACCESS FUNCTIONS
///////////////////////////////////////////////////////////////////////////////
//
//  boo$read'x'_pci_config
//
//  boo$write'x'_pci_config
//
//      Where 'x' is one of b, w, l for 8, 16, and 32-bit accesses
//      respectively.
//
//      Access PCI Config space given a pointer to the caller's PCI_NODE_NUMBER
//      structure.
//
//      BIT FIELD
//      =========
//
//       2:0        function number
//       7:3        device number
//      15:8        bus number
//      31:16       register offset
//
extern uint8  boo$readb_pci_config( PCI_NODE_NUMBER *psPnn );
extern uint16 boo$readw_pci_config( PCI_NODE_NUMBER *psPnn );
extern uint32 boo$readl_pci_config( PCI_NODE_NUMBER *psPnn );
//
extern void boo$writeb_pci_config( PCI_NODE_NUMBER *psPnn, uint8  ubData );
extern void boo$writew_pci_config( PCI_NODE_NUMBER *psPnn, uint16 uwData );
extern void boo$writel_pci_config( PCI_NODE_NUMBER *psPnn, uint32 ulData );
///////////////////////////////////////////////////////////////////////////////

///////////////////////////////////////////////////////////////////////////////
// MEMORY ALLOCATION ROUTINES
///////////////////////////////////////////////////////////////////////////////
//
extern int boo$alloc_contig_mem(int req_size, void **ret_phy_addr, int *ret_size,void **ret_vir_addr);
extern int boo$dealloc_contig_mem(void *phy_addr, int size, void *vir_addr);

#endif // _BOO$IO_SUPPORT_H_LOADED